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BUG=
R=stichnot@chromium.org

Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=57e126899b20c65ff3ea23a3b7d7a67ab30b99dc

[ascull, 2015-09-15 22:49:58]

ascull@google.com changed reviewers:
+ jpp@chromium.org, jvoung@chromium.org, stichnot@chromium.org

[ascull, 2015-09-15 22:49:58]

I thought I'd try and improve build times by removing 300 lines. It also means
there don't need to be distracting reflows in future commits. In case you are
worried about my sanity, I spread this out over a couple of days and had some
macros to help out. As for the sanity of you the reviewer...

P.S. The bit about build time was a joke.

[Jim Stichnoth, 2015-09-16 00:01:29]

LGTM, thanks!

https://codereview.chromium.org/1341423002/diff/1/src/IceAssemblerX86Base.h
File src/IceAssemblerX86Base.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceAssemblerX86Base.h#n...
src/IceAssemblerX86Base.h:963: // instrutions.) If Addr is not nullptr, then Rm
is ignored, and Rex.B is
instructions

https://codereview.chromium.org/1341423002/diff/1/src/IceConverter.cpp
File src/IceConverter.cpp (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceConverter.cpp#newcod...
src/IceConverter.cpp:650: // PNaCl bitcode. Othewise, the behavior is undefined.
Otherwise

https://codereview.chromium.org/1341423002/diff/1/src/IceConverter.cpp#newcod...
src/IceConverter.cpp:668: // declaraation.
declaration

https://codereview.chromium.org/1341423002/diff/1/src/IceGlobalInits.h
File src/IceGlobalInits.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceGlobalInits.h#newcode85
src/IceGlobalInits.h:85: /// that relocations accross pnacl-sz and pnacl-llc
will work).
across

https://codereview.chromium.org/1341423002/diff/1/src/IceInstX86Base.h
File src/IceInstX86Base.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceInstX86Base.h#newcod...
src/IceInstX86Base.h:2203: /// responsiblity to mark eax with a FakeDef.
responsibility

https://codereview.chromium.org/1341423002/diff/1/src/IceLoopAnalyzer.h
File src/IceLoopAnalyzer.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceLoopAnalyzer.h#newco...
src/IceLoopAnalyzer.h:99: /// The fuction to analyze for loops.
function

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringARM32.cpp
File src/IceTargetLoweringARM32.cpp (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringARM32....
src/IceTargetLoweringARM32.cpp:2216: // unconditional mov #0, two cmps, two
conditional mov #1, and one conditonal
conditional

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
File src/IceTargetLoweringX86BaseImpl.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:2770: // shufps treats the source and
desination operands as vectors of four
destination

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:2874: // Some x86-64 processors support the
cmpxchg16b intruction, which can
instruction

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:5160: //
andvancedPhiLowering()=>lowerAssign(). In this case we should reuse
advancedPhiLowering

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:5192: //
andvancedPhiLowering()=>lowerAssign(). In this case we should reuse
advancedPhiLowering

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:5226: // If this memory operand is already a
randommized one, we do not randomize
randomized

https://codereview.chromium.org/1341423002/diff/1/src/PNaClTranslator.cpp
File src/PNaClTranslator.cpp (right):

https://codereview.chromium.org/1341423002/diff/1/src/PNaClTranslator.cpp#new...
src/PNaClTranslator.cpp:2363: // provide it as a separate field. There are also
unnecesary data fields
unnecessary

[ascull, 2015-09-16 18:30:10]

https://codereview.chromium.org/1341423002/diff/1/src/IceAssemblerX86Base.h
File src/IceAssemblerX86Base.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceAssemblerX86Base.h#n...
src/IceAssemblerX86Base.h:963: // instrutions.) If Addr is not nullptr, then Rm
is ignored, and Rex.B is
On 2015/09/16 00:01:29, stichnot wrote:
> instructions

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceConverter.cpp
File src/IceConverter.cpp (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceConverter.cpp#newcod...
src/IceConverter.cpp:650: // PNaCl bitcode. Othewise, the behavior is undefined.
On 2015/09/16 00:01:29, stichnot wrote:
> Otherwise

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceConverter.cpp#newcod...
src/IceConverter.cpp:668: // declaraation.
On 2015/09/16 00:01:29, stichnot wrote:
> declaration

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceGlobalInits.h
File src/IceGlobalInits.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceGlobalInits.h#newcode85
src/IceGlobalInits.h:85: /// that relocations accross pnacl-sz and pnacl-llc
will work).
On 2015/09/16 00:01:29, stichnot wrote:
> across

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceInstX86Base.h
File src/IceInstX86Base.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceInstX86Base.h#newcod...
src/IceInstX86Base.h:2203: /// responsiblity to mark eax with a FakeDef.
On 2015/09/16 00:01:29, stichnot wrote:
> responsibility

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceLoopAnalyzer.h
File src/IceLoopAnalyzer.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceLoopAnalyzer.h#newco...
src/IceLoopAnalyzer.h:99: /// The fuction to analyze for loops.
On 2015/09/16 00:01:29, stichnot wrote:
> function

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringARM32.cpp
File src/IceTargetLoweringARM32.cpp (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringARM32....
src/IceTargetLoweringARM32.cpp:2216: // unconditional mov #0, two cmps, two
conditional mov #1, and one conditonal
On 2015/09/16 00:01:29, stichnot wrote:
> conditional

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
File src/IceTargetLoweringX86BaseImpl.h (right):

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:2770: // shufps treats the source and
desination operands as vectors of four
On 2015/09/16 00:01:29, stichnot wrote:
> destination

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:2874: // Some x86-64 processors support the
cmpxchg16b intruction, which can
On 2015/09/16 00:01:29, stichnot wrote:
> instruction

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:5160: //
andvancedPhiLowering()=>lowerAssign(). In this case we should reuse
On 2015/09/16 00:01:29, stichnot wrote:
> advancedPhiLowering

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:5192: //
andvancedPhiLowering()=>lowerAssign(). In this case we should reuse
On 2015/09/16 00:01:29, stichnot wrote:
> advancedPhiLowering

Done.

https://codereview.chromium.org/1341423002/diff/1/src/IceTargetLoweringX86Bas...
src/IceTargetLoweringX86BaseImpl.h:5226: // If this memory operand is already a
randommized one, we do not randomize
On 2015/09/16 00:01:29, stichnot wrote:
> randomized

Done.

[ascull, 2015-09-16 18:30:24]

Committed patchset #2 (id:20001) manually as
57e126899b20c65ff3ea23a3b7d7a67ab30b99dc (presubmit successful).