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Unified Diff: src/IceRegistersARM32.h

Issue 1341423002: Reflow comments to use the full width. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix spelling and rebase Created 5 years, 3 months ago
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Index: src/IceRegistersARM32.h
diff --git a/src/IceRegistersARM32.h b/src/IceRegistersARM32.h
index a80b9b2deb590b9b86f5a7c1da1ea3e914d878f0..eafed3afde27a9cfbfce75a9c5969eed959aa4c6 100644
--- a/src/IceRegistersARM32.h
+++ b/src/IceRegistersARM32.h
@@ -23,8 +23,8 @@ namespace Ice {
class RegARM32 {
public:
- /// An enum of every register. The enum value may not match the encoding
- /// used to binary encode register operands in instructions.
+ /// An enum of every register. The enum value may not match the encoding used
+ /// to binary encode register operands in instructions.
enum AllRegisters {
#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
isFP32, isFP64, isVec128, alias_init) \
@@ -37,8 +37,8 @@ public:
#undef X
};
- /// An enum of GPR Registers. The enum value does match the encoding used
- /// to binary encode register operands in instructions.
+ /// An enum of GPR Registers. The enum value does match the encoding used to
+ /// binary encode register operands in instructions.
enum GPRRegister {
#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
isFP32, isFP64, isVec128, alias_init) \
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