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src/IceIntrinsics.cpp

 //===- subzero/src/IceIntrinsics.cpp - Functions related to intrinsics ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
-/// This file implements the Intrinsics utilities for matching and
-/// then dispatching by name.
+/// This file implements the Intrinsics utilities for matching and then
+/// dispatching by name.
 ///
 //===----------------------------------------------------------------------===//
 
 #include "IceIntrinsics.h"
 
 #include "IceCfg.h"
 #include "IceCfgNode.h"
 #include "IceInst.h"
 #include "IceLiveness.h"
 #include "IceOperand.h"
 
 #include <utility>
 
 namespace Ice {
 
 static_assert(sizeof(Intrinsics::IntrinsicInfo) == 4,
               "Unexpected sizeof(IntrinsicInfo)");
 
 namespace {
 
 #define INTRIN(ID, SE, RT)                                                     \
   { Intrinsics::ID, Intrinsics::SE, Intrinsics::RT }
 
-// Build list of intrinsics with their attributes and expected prototypes.
-// List is sorted alphabetically.
+// Build list of intrinsics with their attributes and expected prototypes. List
+// is sorted alphabetically.
 const struct IceIntrinsicsEntry_ {
   Intrinsics::FullIntrinsicInfo Info;
   const char *IntrinsicName;
 } IceIntrinsicsTable[] = {
 
 #define AtomicCmpxchgInit(Overload, NameSuffix)                                \
   {                                                                            \
     {                                                                          \
       INTRIN(AtomicCmpxchg, SideEffects_T, ReturnsTwice_F), {Overload,         \
                                                              IceType_i32,      \
@@ skipping 224 matching lines @@
   // Reject orderings not allowed by C++11.
   switch (ID) {
   default:
     llvm_unreachable("isMemoryOrderValid: Unknown IntrinsicID");
     return false;
   case AtomicFence:
   case AtomicFenceAll:
   case AtomicRMW:
     return true;
   case AtomicCmpxchg:
-    // Reject orderings that are disallowed by C++11 as invalid
-    // combinations for cmpxchg.
+    // Reject orderings that are disallowed by C++11 as invalid combinations
+    // for cmpxchg.
     switch (OrderOther) {
     case MemoryOrderRelaxed:
     case MemoryOrderConsume:
     case MemoryOrderAcquire:
     case MemoryOrderSequentiallyConsistent:
       if (OrderOther > Order)
         return false;
       if (Order == MemoryOrderRelease && OrderOther != MemoryOrderRelaxed)
         return false;
       return true;
@@ skipping 43 matching lines @@
   return Intrinsics::IsValidCall;
 }
 
 Type Intrinsics::FullIntrinsicInfo::getArgType(SizeT Index) const {
   assert(NumTypes > 1);
   assert(Index + 1 < NumTypes);
   return Signature[Index + 1];
 }
 
 } // end of namespace Ice