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Issue 1241763002: ARM: Add a postRA pass to legalize stack offsets. Greedy approach (reserve IP). (Closed)

Created:
5 years, 5 months ago by jvoung (off chromium)
Modified:
5 years, 4 months ago
Reviewers:
Karl, Jim Stichnoth, John
CC:
native-client-reviews_googlegroups.com
Base URL:
https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Target Ref:
refs/heads/master
Visibility:
Public.

Description

ARM: Add a postRA pass to legalize stack offsets. Greedy approach (reserve IP). Make a post-register allocation and post-addProlog pass to go through variables with stack offsets and legalize them in case the offsets are not encodeable. The naive approach is to reserve IP, and use IP to movw/movt the offset, then add/sub the frame/stack pointer to IP and use IP as the new base instead of the frame/stack pointer. We do some amount of CSE within a basic block, and share the IP base pointer when it is (a) within range for later stack references, and (b) IP hasn't been clobbered (e.g., by a function call). I chose to do this greedy approach for both Om1 and O2, since it should just be a linear pass, and it reduces the amount of variables/instructions created compared to the super-naive peephole approach (so might be faster?). Introduce a test-only flag and use that to artificially bloat the stack frame so that spill offsets are out of range for ARM. Use that flag for cross tests to stress this new code a bit more (than would have been stressed by simply doing a lit test + FileCheck). Also, the previous version of emitVariable() was using the Var's type to determine the range (only +/- 255 for i16, vs +/- 4095 for i32), even though mov's emit() always uses a full 32-bit "ldr" instead of a 16-bit "ldrh". Use a common legality check, which uses the stackSlotType instead of the Var's type. This previously caused the test_bitmanip to spuriously complain, even though the offsets for Om1 were "only" in the 300 byte range. With this fixed, we can then enable the test_bitmanip test too. BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076 R=stichnot@chromium.org Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=28068adbf34a4602090efddc18b4dd123ffdeb6a

Patch Set 1 #

Patch Set 2 : stuff #

Patch Set 3 : xyz #

Patch Set 4 : check offsets and reformat #

Patch Set 5 : try some simple clustering #

Patch Set 6 : switch to simple greedy clustered mode #

Patch Set 7 : ugh add a virtual? #

Total comments: 11

Patch Set 8 : review #

Unified diffs Side-by-side diffs Delta from patch set Stats (+452 lines, -33 lines) Patch
M Makefile.standalone View 1 2 3 4 5 6 7 1 chunk +1 line, -0 lines 0 comments Download
M pydir/crosstest.py View 1 2 3 4 5 1 chunk +7 lines, -2 lines 0 comments Download
M src/IceCfg.h View 1 2 3 4 5 6 1 chunk +2 lines, -2 lines 0 comments Download
M src/IceClFlags.h View 1 2 2 chunks +9 lines, -0 lines 0 comments Download
M src/IceClFlags.cpp View 1 2 3 4 5 6 7 3 chunks +9 lines, -0 lines 0 comments Download
M src/IceInstARM32.h View 1 2 3 4 5 6 7 2 chunks +30 lines, -0 lines 0 comments Download
M src/IceInstARM32.cpp View 1 2 3 4 5 6 1 chunk +3 lines, -1 line 0 comments Download
M src/IceInstARM32.def View 2 chunks +4 lines, -1 line 0 comments Download
M src/IceOperand.h View 1 2 3 4 5 6 1 chunk +3 lines, -0 lines 0 comments Download
M src/IceOperand.cpp View 1 2 3 4 5 6 1 chunk +4 lines, -2 lines 0 comments Download
M src/IceTargetLowering.h View 1 2 3 4 1 chunk +18 lines, -0 lines 0 comments Download
M src/IceTargetLowering.cpp View 1 2 3 4 5 6 7 2 chunks +14 lines, -0 lines 0 comments Download
M src/IceTargetLoweringARM32.h View 1 2 3 4 5 2 chunks +12 lines, -0 lines 0 comments Download
M src/IceTargetLoweringARM32.cpp View 1 2 3 4 5 6 7 11 chunks +185 lines, -19 lines 0 comments Download
M src/IceTargetLoweringMIPS32.cpp View 1 2 3 4 5 6 7 1 chunk +2 lines, -0 lines 0 comments Download
M src/IceTargetLoweringX86BaseImpl.h View 1 2 3 4 5 6 7 3 chunks +16 lines, -6 lines 0 comments Download
A tests_lit/llvm2ice_tests/large_stack_offs.ll View 1 2 3 4 5 1 chunk +133 lines, -0 lines 0 comments Download

Messages

Total messages: 6 (1 generated)
jvoung (off chromium)
https://codereview.chromium.org/1241763002/diff/120001/src/IceTargetLoweringARM32.cpp File src/IceTargetLoweringARM32.cpp (right): https://codereview.chromium.org/1241763002/diff/120001/src/IceTargetLoweringARM32.cpp#newcode2242 src/IceTargetLoweringARM32.cpp:2242: _mov(T, Zero); misc legalization fix for test_bitmanip, now that ...
5 years, 5 months ago (2015-07-23 23:26:32 UTC) #2
Jim Stichnoth
https://codereview.chromium.org/1241763002/diff/120001/src/IceInstARM32.h File src/IceInstARM32.h (right): https://codereview.chromium.org/1241763002/diff/120001/src/IceInstARM32.h#newcode272 src/IceInstARM32.h:272: int32_t BaseRegNum; int32_t BaseRegNum = Variable::NoRegister; Then you can ...
5 years, 5 months ago (2015-07-24 22:08:30 UTC) #3
jvoung (off chromium)
https://codereview.chromium.org/1241763002/diff/120001/src/IceInstARM32.h File src/IceInstARM32.h (right): https://codereview.chromium.org/1241763002/diff/120001/src/IceInstARM32.h#newcode272 src/IceInstARM32.h:272: int32_t BaseRegNum; On 2015/07/24 22:08:29, stichnot wrote: > int32_t ...
5 years, 4 months ago (2015-07-27 17:02:58 UTC) #4
Jim Stichnoth
LGTM (and sorry for the delay). https://codereview.chromium.org/1241763002/diff/120001/src/IceTargetLowering.h File src/IceTargetLowering.h (right): https://codereview.chromium.org/1241763002/diff/120001/src/IceTargetLowering.h#newcode185 src/IceTargetLowering.h:185: virtual SizeT getFrameOrStackReg() ...
5 years, 4 months ago (2015-07-30 13:34:52 UTC) #5
jvoung (off chromium)
5 years, 4 months ago (2015-07-31 19:58:50 UTC) #6
Message was sent while issue was closed.
Committed patchset #8 (id:140001) manually as
28068adbf34a4602090efddc18b4dd123ffdeb6a (presubmit successful).

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