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Side by Side Diff: src/IceClFlags.cpp

Issue 1241763002: ARM: Add a postRA pass to legalize stack offsets. Greedy approach (reserve IP). (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: review Created 5 years, 4 months ago
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1 //===- subzero/src/IceClFlags.cpp - Command line flags and parsing --------===// 1 //===- subzero/src/IceClFlags.cpp - Command line flags and parsing --------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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138 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), 138 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"),
139 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), 139 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"),
140 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), 140 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"),
141 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), 141 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"),
142 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), 142 clEnumValN(Ice::Target_ARM32, "arm", "arm32"),
143 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), 143 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"),
144 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), 144 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"),
145 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), 145 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"),
146 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)"), 146 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)"),
147 clEnumValEnd)); 147 clEnumValEnd));
148
149 cl::opt<uint32_t> TestStackExtra(
150 "test-stack-extra",
151 cl::desc(
152 "Extra amount of stack to add to the frame in bytes (for testing)."),
153 cl::init(0));
154
148 cl::opt<Ice::TargetInstructionSet> TargetInstructionSet( 155 cl::opt<Ice::TargetInstructionSet> TargetInstructionSet(
149 "mattr", cl::desc("Target architecture attributes"), 156 "mattr", cl::desc("Target architecture attributes"),
150 cl::init(Ice::BaseInstructionSet), 157 cl::init(Ice::BaseInstructionSet),
151 cl::values(clEnumValN(Ice::BaseInstructionSet, "base", 158 cl::values(clEnumValN(Ice::BaseInstructionSet, "base",
152 "Target chooses baseline instruction set (default)"), 159 "Target chooses baseline instruction set (default)"),
153 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", 160 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2",
154 "Enable X86 SSE2 instructions"), 161 "Enable X86 SSE2 instructions"),
155 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", 162 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1",
156 "Enable X86 SSE 4.1 instructions"), 163 "Enable X86 SSE 4.1 instructions"),
157 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", 164 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon",
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355 OutFlags.UseSandboxing = false; 362 OutFlags.UseSandboxing = false;
356 // Enum and integer fields. 363 // Enum and integer fields.
357 OutFlags.Opt = Opt_m1; 364 OutFlags.Opt = Opt_m1;
358 OutFlags.OutFileType = FT_Iasm; 365 OutFlags.OutFileType = FT_Iasm;
359 OutFlags.RandomMaxNopsPerInstruction = 0; 366 OutFlags.RandomMaxNopsPerInstruction = 0;
360 OutFlags.RandomNopProbabilityAsPercentage = 0; 367 OutFlags.RandomNopProbabilityAsPercentage = 0;
361 OutFlags.RandomizeAndPoolImmediatesOption = RPI_None; 368 OutFlags.RandomizeAndPoolImmediatesOption = RPI_None;
362 OutFlags.RandomizeAndPoolImmediatesThreshold = 0xffff; 369 OutFlags.RandomizeAndPoolImmediatesThreshold = 0xffff;
363 OutFlags.ReorderFunctionsWindowSize = 8; 370 OutFlags.ReorderFunctionsWindowSize = 8;
364 OutFlags.TArch = TargetArch_NUM; 371 OutFlags.TArch = TargetArch_NUM;
372 OutFlags.TestStackExtra = 0;
365 OutFlags.VMask = IceV_None; 373 OutFlags.VMask = IceV_None;
366 // IceString fields. 374 // IceString fields.
367 OutFlags.DefaultFunctionPrefix = ""; 375 OutFlags.DefaultFunctionPrefix = "";
368 OutFlags.DefaultGlobalPrefix = ""; 376 OutFlags.DefaultGlobalPrefix = "";
369 OutFlags.TestPrefix = ""; 377 OutFlags.TestPrefix = "";
370 OutFlags.TimingFocusOn = ""; 378 OutFlags.TimingFocusOn = "";
371 OutFlags.TranslateOnly = ""; 379 OutFlags.TranslateOnly = "";
372 OutFlags.VerboseFocusOn = ""; 380 OutFlags.VerboseFocusOn = "";
373 // size_t and 64-bit fields. 381 // size_t and 64-bit fields.
374 OutFlags.NumTranslationThreads = 0; 382 OutFlags.NumTranslationThreads = 0;
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411 OutFlags.setPhiEdgeSplit(::EnablePhiEdgeSplit); 419 OutFlags.setPhiEdgeSplit(::EnablePhiEdgeSplit);
412 } 420 }
413 OutFlags.setRandomSeed(::RandomSeed); 421 OutFlags.setRandomSeed(::RandomSeed);
414 OutFlags.setShouldDoNopInsertion(::ShouldDoNopInsertion); 422 OutFlags.setShouldDoNopInsertion(::ShouldDoNopInsertion);
415 OutFlags.setShouldRandomizeRegAlloc(::RandomizeRegisterAllocation); 423 OutFlags.setShouldRandomizeRegAlloc(::RandomizeRegisterAllocation);
416 OutFlags.setSkipUnimplemented(::SkipUnimplemented); 424 OutFlags.setSkipUnimplemented(::SkipUnimplemented);
417 OutFlags.setSubzeroTimingEnabled(::SubzeroTimingEnabled); 425 OutFlags.setSubzeroTimingEnabled(::SubzeroTimingEnabled);
418 OutFlags.setTargetArch(::TargetArch); 426 OutFlags.setTargetArch(::TargetArch);
419 OutFlags.setTargetInstructionSet(::TargetInstructionSet); 427 OutFlags.setTargetInstructionSet(::TargetInstructionSet);
420 OutFlags.setTestPrefix(::TestPrefix); 428 OutFlags.setTestPrefix(::TestPrefix);
429 OutFlags.setTestStackExtra(::TestStackExtra);
421 OutFlags.setTimeEachFunction(::TimeEachFunction); 430 OutFlags.setTimeEachFunction(::TimeEachFunction);
422 OutFlags.setTimingFocusOn(::TimingFocusOn); 431 OutFlags.setTimingFocusOn(::TimingFocusOn);
423 OutFlags.setTranslateOnly(::TranslateOnly); 432 OutFlags.setTranslateOnly(::TranslateOnly);
424 OutFlags.setUseAdvancedSwitchLowering(::UseAdvancedSwitchLowering); 433 OutFlags.setUseAdvancedSwitchLowering(::UseAdvancedSwitchLowering);
425 OutFlags.setUseSandboxing(::UseSandboxing); 434 OutFlags.setUseSandboxing(::UseSandboxing);
426 OutFlags.setVerboseFocusOn(::VerboseFocusOn); 435 OutFlags.setVerboseFocusOn(::VerboseFocusOn);
427 OutFlags.setOutFileType(::OutFileType); 436 OutFlags.setOutFileType(::OutFileType);
428 OutFlags.setMaxNopsPerInstruction(::MaxNopsPerInstruction); 437 OutFlags.setMaxNopsPerInstruction(::MaxNopsPerInstruction);
429 OutFlags.setNopProbabilityAsPercentage(::NopProbabilityAsPercentage); 438 OutFlags.setNopProbabilityAsPercentage(::NopProbabilityAsPercentage);
430 OutFlags.setVerbose(VMask); 439 OutFlags.setVerbose(VMask);
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453 OutFlagsExtra.setGenerateBuildAtts(GenerateBuildAtts); 462 OutFlagsExtra.setGenerateBuildAtts(GenerateBuildAtts);
454 OutFlagsExtra.setLLVMVerboseErrors(LLVMVerboseErrors); 463 OutFlagsExtra.setLLVMVerboseErrors(LLVMVerboseErrors);
455 OutFlagsExtra.setAppName(AppName); 464 OutFlagsExtra.setAppName(AppName);
456 OutFlagsExtra.setInputFileFormat(InputFileFormat); 465 OutFlagsExtra.setInputFileFormat(InputFileFormat);
457 OutFlagsExtra.setIRFilename(IRFilename); 466 OutFlagsExtra.setIRFilename(IRFilename);
458 OutFlagsExtra.setLogFilename(LogFilename); 467 OutFlagsExtra.setLogFilename(LogFilename);
459 OutFlagsExtra.setOutputFilename(OutputFilename); 468 OutFlagsExtra.setOutputFilename(OutputFilename);
460 } 469 }
461 470
462 } // end of namespace Ice 471 } // end of namespace Ice
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