ARM: Add a postRA pass to legalize stack offsets. Greedy approach (reserve IP).

src/IceTargetLowering.cpp

 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 327 matching lines @@
         LocalsSize[NodeIndex] += Increment;
         if (LocalsSize[NodeIndex] > *SpillAreaSizeBytes)
           *SpillAreaSizeBytes = LocalsSize[NodeIndex];
         if (!*LocalsSlotsAlignmentBytes)
           *LocalsSlotsAlignmentBytes = Increment;
       }
     } else {
       *SpillAreaSizeBytes += Increment;
     }
   }
+  // For testing legalization of large stack offsets on targets with limited
+  // offset bits in instruction encodings, add some padding.
+  *SpillAreaSizeBytes += Ctx->getFlags().getTestStackExtra();
 }
 
 void TargetLowering::alignStackSpillAreas(uint32_t SpillAreaStartOffset,
                                           uint32_t SpillAreaAlignmentBytes,
                                           size_t GlobalsSize,
                                           uint32_t LocalsSlotsAlignmentBytes,
                                           uint32_t *SpillAreaPaddingBytes,
                                           uint32_t *LocalsSlotsPaddingBytes) {
   if (SpillAreaAlignmentBytes) {
     uint32_t PaddingStart = SpillAreaStartOffset;
@@ skipping 11 matching lines @@
     *LocalsSlotsPaddingBytes = GlobalsAndSubsequentPaddingSize - GlobalsSize;
   }
 }
 
 void TargetLowering::assignVarStackSlots(VarList &SortedSpilledVariables,
                                          size_t SpillAreaPaddingBytes,
                                          size_t SpillAreaSizeBytes,
                                          size_t GlobalsAndSubsequentPaddingSize,
                                          bool UsesFramePointer) {
   const VariablesMetadata *VMetadata = Func->getVMetadata();
+  // For testing legalization of large stack offsets on targets with limited
+  // offset bits in instruction encodings, add some padding. This assumes that
+  // SpillAreaSizeBytes has accounted for the extra test padding.
+  // When UseFramePointer is true, the offset depends on the padding,
+  // not just the SpillAreaSizeBytes. On the other hand, when UseFramePointer
+  // is false, the offsets depend on the gap between SpillAreaSizeBytes
+  // and SpillAreaPaddingBytes, so we don't increment that.
+  size_t TestPadding = Ctx->getFlags().getTestStackExtra();
+  if (UsesFramePointer)
+    SpillAreaPaddingBytes += TestPadding;
   size_t GlobalsSpaceUsed = SpillAreaPaddingBytes;
   size_t NextStackOffset = SpillAreaPaddingBytes;
   std::vector<size_t> LocalsSize(Func->getNumNodes());
   const bool SimpleCoalescing = !callsReturnsTwice();
+
   for (Variable *Var : SortedSpilledVariables) {
     size_t Increment = typeWidthInBytesOnStack(Var->getType());
     if (SimpleCoalescing && VMetadata->isTracked(Var)) {
       if (VMetadata->isMultiBlock(Var)) {
         GlobalsSpaceUsed += Increment;
         NextStackOffset = GlobalsSpaceUsed;
       } else {
         SizeT NodeIndex = VMetadata->getLocalUseNode(Var)->getIndex();
         LocalsSize[NodeIndex] += Increment;
         NextStackOffset = SpillAreaPaddingBytes +
@@ skipping 172 matching lines @@
   if (Target == Target_##X)                                                    \
     return TargetHeader##X::create(Ctx);
 #include "llvm/Config/SZTargets.def"
 
   llvm::report_fatal_error("Unsupported target header lowering");
 }
 
 TargetHeaderLowering::~TargetHeaderLowering() = default;
 
 } // end of namespace Ice