[turbofan] Rename floating point register / slot methods.

[turbofan] Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
Committed: https://crrev.com/8c8600db2e3f4fa7787900bc976f2ddd886b7a40
Cr-Commit-Position: refs/heads/master@{#36146}

[bbudge, 2016-05-09 22:52:46]

Description was changed from

==========
V8:Turbofan: Rename floating point register / slot methods.

Renames IsDouble* and GetDouble* methods to IsFP* and GetFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and GetSimd128Register
methods.

LOG=N
BUG=v8:4124
==========

to

==========
V8:Turbofan: Rename floating point register / slot methods.

Renames IsDouble* and GetDouble* methods to IsFP* and GetFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.
One exception is in the code generator for arm 64, to prevent an assert.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

[bbudge, 2016-05-09 23:39:30]

Description was changed from

==========
V8:Turbofan: Rename floating point register / slot methods.

Renames IsDouble* and GetDouble* methods to IsFP* and GetFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.
One exception is in the code generator for arm 64, to prevent an assert.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

to

==========
V8:Turbofan: Rename floating point register / slot methods.

Renames IsDouble* and GetDouble* methods to IsFP* and GetFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

[bbudge, 2016-05-10 00:13:08]

bbudge@chromium.org changed reviewers:
+ bmeurer@chromium.org, titzer@chromium.org

[bbudge, 2016-05-10 00:15:00]

Description was changed from

==========
V8:Turbofan: Rename floating point register / slot methods.

Renames IsDouble* and GetDouble* methods to IsFP* and GetFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

to

==========
V8:Turbofan: Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

[Benedikt Meurer, 2016-05-10 04:03:01]

Description was changed from

==========
V8:Turbofan: Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

to

==========
[turbofan] Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

[Benedikt Meurer, 2016-05-10 04:03:23]

Nice. LGTM.

[bbudge, 2016-05-10 15:16:55]

The CQ bit was checked by bbudge@chromium.org

[commit-bot: I haz the power, 2016-05-10 15:17:01]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1959763002/140001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1959763002/140001

[commit-bot: I haz the power, 2016-05-10 15:19:04]

Description was changed from

==========
[turbofan] Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

to

==========
[turbofan] Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

[commit-bot: I haz the power, 2016-05-10 15:19:05]

Committed patchset #8 (id:140001)

[commit-bot: I haz the power, 2016-05-10 15:20:36]

Description was changed from

==========
[turbofan] Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124
==========

to

==========
[turbofan] Rename floating point register / slot methods.

Renames IsDouble* predicates to IsFP*.
Adds specific IsFloat*, IsDouble*, and IsSimd128* predicates.
Adds specific GetFloatRegister, GetDoubleRegister, and
GetSimd128Register methods.

This is mostly a mechanical renaming of IsDouble* to IsFP* methods.

This shouldn't change code generation at all. All fp registers are still
treated as double registers.

LOG=N
BUG=v8:4124

Committed: https://crrev.com/8c8600db2e3f4fa7787900bc976f2ddd886b7a40
Cr-Commit-Position: refs/heads/master@{#36146}
==========

[commit-bot: I haz the power, 2016-05-10 15:20:37]

Patchset 8 (id:??) landed as
https://crrev.com/8c8600db2e3f4fa7787900bc976f2ddd886b7a40
Cr-Commit-Position: refs/heads/master@{#36146}