[turbofan] Rename floating point register / slot methods.

src/compiler/instruction.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_INSTRUCTION_H_
 #define V8_COMPILER_INSTRUCTION_H_
 
 #include <deque>
 #include <iosfwd>
 #include <map>
@@ skipping 48 matching lines @@
   // stack slots, completely bypassing the register allocator. They are never
   // associated with a virtual register
   INSTRUCTION_OPERAND_PREDICATE(Explicit, EXPLICIT)
   // AllocatedOperands are registers or stack slots that are assigned by the
   // register allocator and are always associated with a virtual register.
   INSTRUCTION_OPERAND_PREDICATE(Allocated, ALLOCATED)
 #undef INSTRUCTION_OPERAND_PREDICATE
 
   inline bool IsAnyRegister() const;
   inline bool IsRegister() const;
+  inline bool IsFPRegister() const;
+  inline bool IsFloatRegister() const;
   inline bool IsDoubleRegister() const;
   inline bool IsSimd128Register() const;
   inline bool IsStackSlot() const;
+  inline bool IsFPStackSlot() const;
+  inline bool IsFloatStackSlot() const;
   inline bool IsDoubleStackSlot() const;
   inline bool IsSimd128StackSlot() const;
 
   template <typename SubKindOperand>
   static SubKindOperand* New(Zone* zone, const SubKindOperand& op) {
     void* buffer = zone->New(sizeof(op));
     return new (buffer) SubKindOperand(op);
   }
 
   static void ReplaceWith(InstructionOperand* dest,
@@ skipping 324 matching lines @@
                   MachineRepresentation rep, int index)
       : InstructionOperand(operand_kind) {
     DCHECK_IMPLIES(location_kind == REGISTER, index >= 0);
     DCHECK(IsSupportedRepresentation(rep));
     value_ |= LocationKindField::encode(location_kind);
     value_ |= RepresentationField::encode(rep);
     value_ |= static_cast<int64_t>(index) << IndexField::kShift;
   }
 
   int index() const {
-    DCHECK(IsStackSlot() || IsDoubleStackSlot() || IsSimd128StackSlot());
+    DCHECK(IsStackSlot() || IsFPStackSlot());
     return static_cast<int64_t>(value_) >> IndexField::kShift;
   }
 
   Register GetRegister() const {
     DCHECK(IsRegister());
     return Register::from_code(static_cast<int64_t>(value_) >>
                                IndexField::kShift);
   }
 
+  FloatRegister GetFloatRegister() const {
+    DCHECK(IsFloatRegister());
+    return FloatRegister::from_code(static_cast<int64_t>(value_) >>
+                                    IndexField::kShift);
+  }
+
   DoubleRegister GetDoubleRegister() const {
-    DCHECK(IsDoubleRegister());
+    // TODO(bbudge) Tighten this test to IsDoubleRegister when all code
+    // generators are changed to use the correct Get*Register method.
+    DCHECK(IsFPRegister());
     return DoubleRegister::from_code(static_cast<int64_t>(value_) >>
                                      IndexField::kShift);
   }
 
   Simd128Register GetSimd128Register() const {
     DCHECK(IsSimd128Register());
     return Simd128Register::from_code(static_cast<int64_t>(value_) >>
                                       IndexField::kShift);
   }
 
@@ skipping 81 matching lines @@
          LocationOperand::cast(this)->location_kind() ==
              LocationOperand::REGISTER;
 }
 
 
 bool InstructionOperand::IsRegister() const {
   return IsAnyRegister() &&
          !IsFloatingPoint(LocationOperand::cast(this)->representation());
 }
 
+bool InstructionOperand::IsFPRegister() const {
+  return IsAnyRegister() &&
+         IsFloatingPoint(LocationOperand::cast(this)->representation());
+}
+
+bool InstructionOperand::IsFloatRegister() const {
+  return IsAnyRegister() &&
+         LocationOperand::cast(this)->representation() ==
+             MachineRepresentation::kFloat32;
+}
+
 bool InstructionOperand::IsDoubleRegister() const {
   return IsAnyRegister() &&
-         IsFloatingPoint(LocationOperand::cast(this)->representation());
+         LocationOperand::cast(this)->representation() ==
+             MachineRepresentation::kFloat64;
 }
 
 bool InstructionOperand::IsSimd128Register() const {
   return IsAnyRegister() &&
          LocationOperand::cast(this)->representation() ==
              MachineRepresentation::kSimd128;
 }
 
 bool InstructionOperand::IsStackSlot() const {
   return (IsAllocated() || IsExplicit()) &&
          LocationOperand::cast(this)->location_kind() ==
              LocationOperand::STACK_SLOT &&
          !IsFloatingPoint(LocationOperand::cast(this)->representation());
 }
 
+bool InstructionOperand::IsFPStackSlot() const {
+  return (IsAllocated() || IsExplicit()) &&
+         LocationOperand::cast(this)->location_kind() ==
+             LocationOperand::STACK_SLOT &&
+         IsFloatingPoint(LocationOperand::cast(this)->representation());
+}
+
+bool InstructionOperand::IsFloatStackSlot() const {
+  return (IsAllocated() || IsExplicit()) &&
+         LocationOperand::cast(this)->location_kind() ==
+             LocationOperand::STACK_SLOT &&
+         LocationOperand::cast(this)->representation() ==
+             MachineRepresentation::kFloat32;
+}
+
 bool InstructionOperand::IsDoubleStackSlot() const {
   return (IsAllocated() || IsExplicit()) &&
          LocationOperand::cast(this)->location_kind() ==
              LocationOperand::STACK_SLOT &&
-         IsFloatingPoint(LocationOperand::cast(this)->representation());
+         LocationOperand::cast(this)->representation() ==
+             MachineRepresentation::kFloat64;
 }
 
 bool InstructionOperand::IsSimd128StackSlot() const {
   return (IsAllocated() || IsExplicit()) &&
          LocationOperand::cast(this)->location_kind() ==
              LocationOperand::STACK_SLOT &&
          LocationOperand::cast(this)->representation() ==
              MachineRepresentation::kSimd128;
 }
 
@@ skipping 865 matching lines @@
 
 
 std::ostream& operator<<(std::ostream& os,
                          const PrintableInstructionSequence& code);
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_INSTRUCTION_H_