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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/ast/scopes.h" | 5 #include "src/ast/scopes.h" |
6 #include "src/compiler/code-generator.h" | 6 #include "src/compiler/code-generator.h" |
7 #include "src/compiler/code-generator-impl.h" | 7 #include "src/compiler/code-generator-impl.h" |
8 #include "src/compiler/gap-resolver.h" | 8 #include "src/compiler/gap-resolver.h" |
9 #include "src/compiler/node-matchers.h" | 9 #include "src/compiler/node-matchers.h" |
10 #include "src/compiler/osr.h" | 10 #include "src/compiler/osr.h" |
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112 UNREACHABLE(); | 112 UNREACHABLE(); |
113 } | 113 } |
114 UNREACHABLE(); | 114 UNREACHABLE(); |
115 return MemOperand(no_reg); | 115 return MemOperand(no_reg); |
116 } | 116 } |
117 | 117 |
118 MemOperand MemoryOperand(size_t index = 0) { return MemoryOperand(&index); } | 118 MemOperand MemoryOperand(size_t index = 0) { return MemoryOperand(&index); } |
119 | 119 |
120 MemOperand ToMemOperand(InstructionOperand* op) const { | 120 MemOperand ToMemOperand(InstructionOperand* op) const { |
121 DCHECK_NOT_NULL(op); | 121 DCHECK_NOT_NULL(op); |
122 DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot()); | 122 DCHECK(op->IsStackSlot() || op->IsFPStackSlot()); |
123 return SlotToMemOperand(AllocatedOperand::cast(op)->index()); | 123 return SlotToMemOperand(AllocatedOperand::cast(op)->index()); |
124 } | 124 } |
125 | 125 |
126 MemOperand SlotToMemOperand(int slot) const { | 126 MemOperand SlotToMemOperand(int slot) const { |
127 FrameOffset offset = frame_access_state()->GetFrameOffset(slot); | 127 FrameOffset offset = frame_access_state()->GetFrameOffset(slot); |
128 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset()); | 128 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset()); |
129 } | 129 } |
130 }; | 130 }; |
131 | 131 |
132 | 132 |
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1519 __ swc1(i.InputSingleRegister(index), operand); | 1519 __ swc1(i.InputSingleRegister(index), operand); |
1520 break; | 1520 break; |
1521 } | 1521 } |
1522 case kMips64Ldc1: | 1522 case kMips64Ldc1: |
1523 __ ldc1(i.OutputDoubleRegister(), i.MemoryOperand()); | 1523 __ ldc1(i.OutputDoubleRegister(), i.MemoryOperand()); |
1524 break; | 1524 break; |
1525 case kMips64Sdc1: | 1525 case kMips64Sdc1: |
1526 __ sdc1(i.InputDoubleRegister(2), i.MemoryOperand()); | 1526 __ sdc1(i.InputDoubleRegister(2), i.MemoryOperand()); |
1527 break; | 1527 break; |
1528 case kMips64Push: | 1528 case kMips64Push: |
1529 if (instr->InputAt(0)->IsDoubleRegister()) { | 1529 if (instr->InputAt(0)->IsFPRegister()) { |
1530 __ sdc1(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize)); | 1530 __ sdc1(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize)); |
1531 __ Subu(sp, sp, Operand(kDoubleSize)); | 1531 __ Subu(sp, sp, Operand(kDoubleSize)); |
1532 frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize); | 1532 frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize); |
1533 } else { | 1533 } else { |
1534 __ Push(i.InputRegister(0)); | 1534 __ Push(i.InputRegister(0)); |
1535 frame_access_state()->IncreaseSPDelta(1); | 1535 frame_access_state()->IncreaseSPDelta(1); |
1536 } | 1536 } |
1537 break; | 1537 break; |
1538 case kMips64StackClaim: { | 1538 case kMips64StackClaim: { |
1539 __ Dsubu(sp, sp, Operand(i.InputInt32(0))); | 1539 __ Dsubu(sp, sp, Operand(i.InputInt32(0))); |
1540 frame_access_state()->IncreaseSPDelta(i.InputInt32(0) / kPointerSize); | 1540 frame_access_state()->IncreaseSPDelta(i.InputInt32(0) / kPointerSize); |
1541 break; | 1541 break; |
1542 } | 1542 } |
1543 case kMips64StoreToStackSlot: { | 1543 case kMips64StoreToStackSlot: { |
1544 if (instr->InputAt(0)->IsDoubleRegister()) { | 1544 if (instr->InputAt(0)->IsFPRegister()) { |
1545 __ sdc1(i.InputDoubleRegister(0), MemOperand(sp, i.InputInt32(1))); | 1545 __ sdc1(i.InputDoubleRegister(0), MemOperand(sp, i.InputInt32(1))); |
1546 } else { | 1546 } else { |
1547 __ sd(i.InputRegister(0), MemOperand(sp, i.InputInt32(1))); | 1547 __ sd(i.InputRegister(0), MemOperand(sp, i.InputInt32(1))); |
1548 } | 1548 } |
1549 break; | 1549 break; |
1550 } | 1550 } |
1551 case kCheckedLoadInt8: | 1551 case kCheckedLoadInt8: |
1552 ASSEMBLE_CHECKED_LOAD_INTEGER(lb); | 1552 ASSEMBLE_CHECKED_LOAD_INTEGER(lb); |
1553 break; | 1553 break; |
1554 case kCheckedLoadUint8: | 1554 case kCheckedLoadUint8: |
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2104 __ li(dst, src_object); | 2104 __ li(dst, src_object); |
2105 } | 2105 } |
2106 break; | 2106 break; |
2107 } | 2107 } |
2108 case Constant::kRpoNumber: | 2108 case Constant::kRpoNumber: |
2109 UNREACHABLE(); // TODO(titzer): loading RPO numbers on mips64. | 2109 UNREACHABLE(); // TODO(titzer): loading RPO numbers on mips64. |
2110 break; | 2110 break; |
2111 } | 2111 } |
2112 if (destination->IsStackSlot()) __ sd(dst, g.ToMemOperand(destination)); | 2112 if (destination->IsStackSlot()) __ sd(dst, g.ToMemOperand(destination)); |
2113 } else if (src.type() == Constant::kFloat32) { | 2113 } else if (src.type() == Constant::kFloat32) { |
2114 if (destination->IsDoubleStackSlot()) { | 2114 if (destination->IsFPStackSlot()) { |
2115 MemOperand dst = g.ToMemOperand(destination); | 2115 MemOperand dst = g.ToMemOperand(destination); |
2116 __ li(at, Operand(bit_cast<int32_t>(src.ToFloat32()))); | 2116 __ li(at, Operand(bit_cast<int32_t>(src.ToFloat32()))); |
2117 __ sw(at, dst); | 2117 __ sw(at, dst); |
2118 } else { | 2118 } else { |
2119 FloatRegister dst = g.ToSingleRegister(destination); | 2119 FloatRegister dst = g.ToSingleRegister(destination); |
2120 __ Move(dst, src.ToFloat32()); | 2120 __ Move(dst, src.ToFloat32()); |
2121 } | 2121 } |
2122 } else { | 2122 } else { |
2123 DCHECK_EQ(Constant::kFloat64, src.type()); | 2123 DCHECK_EQ(Constant::kFloat64, src.type()); |
2124 DoubleRegister dst = destination->IsDoubleRegister() | 2124 DoubleRegister dst = destination->IsFPRegister() |
2125 ? g.ToDoubleRegister(destination) | 2125 ? g.ToDoubleRegister(destination) |
2126 : kScratchDoubleReg; | 2126 : kScratchDoubleReg; |
2127 __ Move(dst, src.ToFloat64()); | 2127 __ Move(dst, src.ToFloat64()); |
2128 if (destination->IsDoubleStackSlot()) { | 2128 if (destination->IsFPStackSlot()) { |
2129 __ sdc1(dst, g.ToMemOperand(destination)); | 2129 __ sdc1(dst, g.ToMemOperand(destination)); |
2130 } | 2130 } |
2131 } | 2131 } |
2132 } else if (source->IsDoubleRegister()) { | 2132 } else if (source->IsFPRegister()) { |
2133 FPURegister src = g.ToDoubleRegister(source); | 2133 FPURegister src = g.ToDoubleRegister(source); |
2134 if (destination->IsDoubleRegister()) { | 2134 if (destination->IsFPRegister()) { |
2135 FPURegister dst = g.ToDoubleRegister(destination); | 2135 FPURegister dst = g.ToDoubleRegister(destination); |
2136 __ Move(dst, src); | 2136 __ Move(dst, src); |
2137 } else { | 2137 } else { |
2138 DCHECK(destination->IsDoubleStackSlot()); | 2138 DCHECK(destination->IsFPStackSlot()); |
2139 __ sdc1(src, g.ToMemOperand(destination)); | 2139 __ sdc1(src, g.ToMemOperand(destination)); |
2140 } | 2140 } |
2141 } else if (source->IsDoubleStackSlot()) { | 2141 } else if (source->IsFPStackSlot()) { |
2142 DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot()); | 2142 DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot()); |
2143 MemOperand src = g.ToMemOperand(source); | 2143 MemOperand src = g.ToMemOperand(source); |
2144 if (destination->IsDoubleRegister()) { | 2144 if (destination->IsFPRegister()) { |
2145 __ ldc1(g.ToDoubleRegister(destination), src); | 2145 __ ldc1(g.ToDoubleRegister(destination), src); |
2146 } else { | 2146 } else { |
2147 FPURegister temp = kScratchDoubleReg; | 2147 FPURegister temp = kScratchDoubleReg; |
2148 __ ldc1(temp, src); | 2148 __ ldc1(temp, src); |
2149 __ sdc1(temp, g.ToMemOperand(destination)); | 2149 __ sdc1(temp, g.ToMemOperand(destination)); |
2150 } | 2150 } |
2151 } else { | 2151 } else { |
2152 UNREACHABLE(); | 2152 UNREACHABLE(); |
2153 } | 2153 } |
2154 } | 2154 } |
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2178 } else if (source->IsStackSlot()) { | 2178 } else if (source->IsStackSlot()) { |
2179 DCHECK(destination->IsStackSlot()); | 2179 DCHECK(destination->IsStackSlot()); |
2180 Register temp_0 = kScratchReg; | 2180 Register temp_0 = kScratchReg; |
2181 Register temp_1 = kScratchReg2; | 2181 Register temp_1 = kScratchReg2; |
2182 MemOperand src = g.ToMemOperand(source); | 2182 MemOperand src = g.ToMemOperand(source); |
2183 MemOperand dst = g.ToMemOperand(destination); | 2183 MemOperand dst = g.ToMemOperand(destination); |
2184 __ ld(temp_0, src); | 2184 __ ld(temp_0, src); |
2185 __ ld(temp_1, dst); | 2185 __ ld(temp_1, dst); |
2186 __ sd(temp_0, dst); | 2186 __ sd(temp_0, dst); |
2187 __ sd(temp_1, src); | 2187 __ sd(temp_1, src); |
2188 } else if (source->IsDoubleRegister()) { | 2188 } else if (source->IsFPRegister()) { |
2189 FPURegister temp = kScratchDoubleReg; | 2189 FPURegister temp = kScratchDoubleReg; |
2190 FPURegister src = g.ToDoubleRegister(source); | 2190 FPURegister src = g.ToDoubleRegister(source); |
2191 if (destination->IsDoubleRegister()) { | 2191 if (destination->IsFPRegister()) { |
2192 FPURegister dst = g.ToDoubleRegister(destination); | 2192 FPURegister dst = g.ToDoubleRegister(destination); |
2193 __ Move(temp, src); | 2193 __ Move(temp, src); |
2194 __ Move(src, dst); | 2194 __ Move(src, dst); |
2195 __ Move(dst, temp); | 2195 __ Move(dst, temp); |
2196 } else { | 2196 } else { |
2197 DCHECK(destination->IsDoubleStackSlot()); | 2197 DCHECK(destination->IsFPStackSlot()); |
2198 MemOperand dst = g.ToMemOperand(destination); | 2198 MemOperand dst = g.ToMemOperand(destination); |
2199 __ Move(temp, src); | 2199 __ Move(temp, src); |
2200 __ ldc1(src, dst); | 2200 __ ldc1(src, dst); |
2201 __ sdc1(temp, dst); | 2201 __ sdc1(temp, dst); |
2202 } | 2202 } |
2203 } else if (source->IsDoubleStackSlot()) { | 2203 } else if (source->IsFPStackSlot()) { |
2204 DCHECK(destination->IsDoubleStackSlot()); | 2204 DCHECK(destination->IsFPStackSlot()); |
2205 Register temp_0 = kScratchReg; | 2205 Register temp_0 = kScratchReg; |
2206 FPURegister temp_1 = kScratchDoubleReg; | 2206 FPURegister temp_1 = kScratchDoubleReg; |
2207 MemOperand src0 = g.ToMemOperand(source); | 2207 MemOperand src0 = g.ToMemOperand(source); |
2208 MemOperand src1(src0.rm(), src0.offset() + kIntSize); | 2208 MemOperand src1(src0.rm(), src0.offset() + kIntSize); |
2209 MemOperand dst0 = g.ToMemOperand(destination); | 2209 MemOperand dst0 = g.ToMemOperand(destination); |
2210 MemOperand dst1(dst0.rm(), dst0.offset() + kIntSize); | 2210 MemOperand dst1(dst0.rm(), dst0.offset() + kIntSize); |
2211 __ ldc1(temp_1, dst0); // Save destination in temp_1. | 2211 __ ldc1(temp_1, dst0); // Save destination in temp_1. |
2212 __ lw(temp_0, src0); // Then use temp_0 to copy source to destination. | 2212 __ lw(temp_0, src0); // Then use temp_0 to copy source to destination. |
2213 __ sw(temp_0, dst0); | 2213 __ sw(temp_0, dst0); |
2214 __ lw(temp_0, src1); | 2214 __ lw(temp_0, src1); |
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2247 padding_size -= v8::internal::Assembler::kInstrSize; | 2247 padding_size -= v8::internal::Assembler::kInstrSize; |
2248 } | 2248 } |
2249 } | 2249 } |
2250 } | 2250 } |
2251 | 2251 |
2252 #undef __ | 2252 #undef __ |
2253 | 2253 |
2254 } // namespace compiler | 2254 } // namespace compiler |
2255 } // namespace internal | 2255 } // namespace internal |
2256 } // namespace v8 | 2256 } // namespace v8 |
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