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Side by Side Diff: src/compiler/ppc/code-generator-ppc.cc

Issue 1959763002: [turbofan] Rename floating point register / slot methods. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Unfix arm64. Created 4 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/ast/scopes.h" 7 #include "src/ast/scopes.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
(...skipping 85 matching lines...) Expand 10 before | Expand all | Expand 10 after
96 UNREACHABLE(); 96 UNREACHABLE();
97 return MemOperand(r0); 97 return MemOperand(r0);
98 } 98 }
99 99
100 MemOperand MemoryOperand(AddressingMode* mode, size_t first_index = 0) { 100 MemOperand MemoryOperand(AddressingMode* mode, size_t first_index = 0) {
101 return MemoryOperand(mode, &first_index); 101 return MemoryOperand(mode, &first_index);
102 } 102 }
103 103
104 MemOperand ToMemOperand(InstructionOperand* op) const { 104 MemOperand ToMemOperand(InstructionOperand* op) const {
105 DCHECK_NOT_NULL(op); 105 DCHECK_NOT_NULL(op);
106 DCHECK(op->IsStackSlot() || op->IsDoubleStackSlot()); 106 DCHECK(op->IsStackSlot() || op->IsFPStackSlot());
107 return SlotToMemOperand(AllocatedOperand::cast(op)->index()); 107 return SlotToMemOperand(AllocatedOperand::cast(op)->index());
108 } 108 }
109 109
110 MemOperand SlotToMemOperand(int slot) const { 110 MemOperand SlotToMemOperand(int slot) const {
111 FrameOffset offset = frame_access_state()->GetFrameOffset(slot); 111 FrameOffset offset = frame_access_state()->GetFrameOffset(slot);
112 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset()); 112 return MemOperand(offset.from_stack_pointer() ? sp : fp, offset.offset());
113 } 113 }
114 }; 114 };
115 115
116 116
(...skipping 1185 matching lines...) Expand 10 before | Expand all | Expand 10 after
1302 case kPPC_Tst64: 1302 case kPPC_Tst64:
1303 if (HasRegisterInput(instr, 1)) { 1303 if (HasRegisterInput(instr, 1)) {
1304 __ and_(r0, i.InputRegister(0), i.InputRegister(1), i.OutputRCBit()); 1304 __ and_(r0, i.InputRegister(0), i.InputRegister(1), i.OutputRCBit());
1305 } else { 1305 } else {
1306 __ andi(r0, i.InputRegister(0), i.InputImmediate(1)); 1306 __ andi(r0, i.InputRegister(0), i.InputImmediate(1));
1307 } 1307 }
1308 DCHECK_EQ(SetRC, i.OutputRCBit()); 1308 DCHECK_EQ(SetRC, i.OutputRCBit());
1309 break; 1309 break;
1310 #endif 1310 #endif
1311 case kPPC_Push: 1311 case kPPC_Push:
1312 if (instr->InputAt(0)->IsDoubleRegister()) { 1312 if (instr->InputAt(0)->IsFPRegister()) {
1313 __ stfdu(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize)); 1313 __ stfdu(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize));
1314 frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize); 1314 frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize);
1315 } else { 1315 } else {
1316 __ Push(i.InputRegister(0)); 1316 __ Push(i.InputRegister(0));
1317 frame_access_state()->IncreaseSPDelta(1); 1317 frame_access_state()->IncreaseSPDelta(1);
1318 } 1318 }
1319 DCHECK_EQ(LeaveRC, i.OutputRCBit()); 1319 DCHECK_EQ(LeaveRC, i.OutputRCBit());
1320 break; 1320 break;
1321 case kPPC_PushFrame: { 1321 case kPPC_PushFrame: {
1322 int num_slots = i.InputInt32(1); 1322 int num_slots = i.InputInt32(1);
1323 if (instr->InputAt(0)->IsDoubleRegister()) { 1323 if (instr->InputAt(0)->IsFPRegister()) {
1324 __ StoreDoubleU(i.InputDoubleRegister(0), 1324 __ StoreDoubleU(i.InputDoubleRegister(0),
1325 MemOperand(sp, -num_slots * kPointerSize), r0); 1325 MemOperand(sp, -num_slots * kPointerSize), r0);
1326 } else { 1326 } else {
1327 __ StorePU(i.InputRegister(0), 1327 __ StorePU(i.InputRegister(0),
1328 MemOperand(sp, -num_slots * kPointerSize), r0); 1328 MemOperand(sp, -num_slots * kPointerSize), r0);
1329 } 1329 }
1330 break; 1330 break;
1331 } 1331 }
1332 case kPPC_StoreToStackSlot: { 1332 case kPPC_StoreToStackSlot: {
1333 int slot = i.InputInt32(1); 1333 int slot = i.InputInt32(1);
1334 if (instr->InputAt(0)->IsDoubleRegister()) { 1334 if (instr->InputAt(0)->IsFPRegister()) {
1335 __ StoreDouble(i.InputDoubleRegister(0), 1335 __ StoreDouble(i.InputDoubleRegister(0),
1336 MemOperand(sp, slot * kPointerSize), r0); 1336 MemOperand(sp, slot * kPointerSize), r0);
1337 } else { 1337 } else {
1338 __ StoreP(i.InputRegister(0), MemOperand(sp, slot * kPointerSize), r0); 1338 __ StoreP(i.InputRegister(0), MemOperand(sp, slot * kPointerSize), r0);
1339 } 1339 }
1340 break; 1340 break;
1341 } 1341 }
1342 case kPPC_ExtendSignWord8: 1342 case kPPC_ExtendSignWord8:
1343 __ extsb(i.OutputRegister(), i.InputRegister(0)); 1343 __ extsb(i.OutputRegister(), i.InputRegister(0));
1344 DCHECK_EQ(LeaveRC, i.OutputRCBit()); 1344 DCHECK_EQ(LeaveRC, i.OutputRCBit());
(...skipping 628 matching lines...) Expand 10 before | Expand all | Expand 10 after
1973 break; 1973 break;
1974 } 1974 }
1975 case Constant::kRpoNumber: 1975 case Constant::kRpoNumber:
1976 UNREACHABLE(); // TODO(dcarney): loading RPO constants on PPC. 1976 UNREACHABLE(); // TODO(dcarney): loading RPO constants on PPC.
1977 break; 1977 break;
1978 } 1978 }
1979 if (destination->IsStackSlot()) { 1979 if (destination->IsStackSlot()) {
1980 __ StoreP(dst, g.ToMemOperand(destination), r0); 1980 __ StoreP(dst, g.ToMemOperand(destination), r0);
1981 } 1981 }
1982 } else { 1982 } else {
1983 DoubleRegister dst = destination->IsDoubleRegister() 1983 DoubleRegister dst = destination->IsFPRegister()
1984 ? g.ToDoubleRegister(destination) 1984 ? g.ToDoubleRegister(destination)
1985 : kScratchDoubleReg; 1985 : kScratchDoubleReg;
1986 double value = (src.type() == Constant::kFloat32) ? src.ToFloat32() 1986 double value = (src.type() == Constant::kFloat32) ? src.ToFloat32()
1987 : src.ToFloat64(); 1987 : src.ToFloat64();
1988 __ LoadDoubleLiteral(dst, value, kScratchReg); 1988 __ LoadDoubleLiteral(dst, value, kScratchReg);
1989 if (destination->IsDoubleStackSlot()) { 1989 if (destination->IsFPStackSlot()) {
1990 __ StoreDouble(dst, g.ToMemOperand(destination), r0); 1990 __ StoreDouble(dst, g.ToMemOperand(destination), r0);
1991 } 1991 }
1992 } 1992 }
1993 } else if (source->IsDoubleRegister()) { 1993 } else if (source->IsFPRegister()) {
1994 DoubleRegister src = g.ToDoubleRegister(source); 1994 DoubleRegister src = g.ToDoubleRegister(source);
1995 if (destination->IsDoubleRegister()) { 1995 if (destination->IsFPRegister()) {
1996 DoubleRegister dst = g.ToDoubleRegister(destination); 1996 DoubleRegister dst = g.ToDoubleRegister(destination);
1997 __ Move(dst, src); 1997 __ Move(dst, src);
1998 } else { 1998 } else {
1999 DCHECK(destination->IsDoubleStackSlot()); 1999 DCHECK(destination->IsFPStackSlot());
2000 __ StoreDouble(src, g.ToMemOperand(destination), r0); 2000 __ StoreDouble(src, g.ToMemOperand(destination), r0);
2001 } 2001 }
2002 } else if (source->IsDoubleStackSlot()) { 2002 } else if (source->IsFPStackSlot()) {
2003 DCHECK(destination->IsDoubleRegister() || destination->IsDoubleStackSlot()); 2003 DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot());
2004 MemOperand src = g.ToMemOperand(source); 2004 MemOperand src = g.ToMemOperand(source);
2005 if (destination->IsDoubleRegister()) { 2005 if (destination->IsFPRegister()) {
2006 __ LoadDouble(g.ToDoubleRegister(destination), src, r0); 2006 __ LoadDouble(g.ToDoubleRegister(destination), src, r0);
2007 } else { 2007 } else {
2008 DoubleRegister temp = kScratchDoubleReg; 2008 DoubleRegister temp = kScratchDoubleReg;
2009 __ LoadDouble(temp, src, r0); 2009 __ LoadDouble(temp, src, r0);
2010 __ StoreDouble(temp, g.ToMemOperand(destination), r0); 2010 __ StoreDouble(temp, g.ToMemOperand(destination), r0);
2011 } 2011 }
2012 } else { 2012 } else {
2013 UNREACHABLE(); 2013 UNREACHABLE();
2014 } 2014 }
2015 } 2015 }
(...skipping 14 matching lines...) Expand all
2030 __ mr(src, dst); 2030 __ mr(src, dst);
2031 __ mr(dst, temp); 2031 __ mr(dst, temp);
2032 } else { 2032 } else {
2033 DCHECK(destination->IsStackSlot()); 2033 DCHECK(destination->IsStackSlot());
2034 MemOperand dst = g.ToMemOperand(destination); 2034 MemOperand dst = g.ToMemOperand(destination);
2035 __ mr(temp, src); 2035 __ mr(temp, src);
2036 __ LoadP(src, dst); 2036 __ LoadP(src, dst);
2037 __ StoreP(temp, dst); 2037 __ StoreP(temp, dst);
2038 } 2038 }
2039 #if V8_TARGET_ARCH_PPC64 2039 #if V8_TARGET_ARCH_PPC64
2040 } else if (source->IsStackSlot() || source->IsDoubleStackSlot()) { 2040 } else if (source->IsStackSlot() || source->IsFPStackSlot()) {
2041 #else 2041 #else
2042 } else if (source->IsStackSlot()) { 2042 } else if (source->IsStackSlot()) {
2043 DCHECK(destination->IsStackSlot()); 2043 DCHECK(destination->IsStackSlot());
2044 #endif 2044 #endif
2045 Register temp_0 = kScratchReg; 2045 Register temp_0 = kScratchReg;
2046 Register temp_1 = r0; 2046 Register temp_1 = r0;
2047 MemOperand src = g.ToMemOperand(source); 2047 MemOperand src = g.ToMemOperand(source);
2048 MemOperand dst = g.ToMemOperand(destination); 2048 MemOperand dst = g.ToMemOperand(destination);
2049 __ LoadP(temp_0, src); 2049 __ LoadP(temp_0, src);
2050 __ LoadP(temp_1, dst); 2050 __ LoadP(temp_1, dst);
2051 __ StoreP(temp_0, dst); 2051 __ StoreP(temp_0, dst);
2052 __ StoreP(temp_1, src); 2052 __ StoreP(temp_1, src);
2053 } else if (source->IsDoubleRegister()) { 2053 } else if (source->IsFPRegister()) {
2054 DoubleRegister temp = kScratchDoubleReg; 2054 DoubleRegister temp = kScratchDoubleReg;
2055 DoubleRegister src = g.ToDoubleRegister(source); 2055 DoubleRegister src = g.ToDoubleRegister(source);
2056 if (destination->IsDoubleRegister()) { 2056 if (destination->IsFPRegister()) {
2057 DoubleRegister dst = g.ToDoubleRegister(destination); 2057 DoubleRegister dst = g.ToDoubleRegister(destination);
2058 __ fmr(temp, src); 2058 __ fmr(temp, src);
2059 __ fmr(src, dst); 2059 __ fmr(src, dst);
2060 __ fmr(dst, temp); 2060 __ fmr(dst, temp);
2061 } else { 2061 } else {
2062 DCHECK(destination->IsDoubleStackSlot()); 2062 DCHECK(destination->IsFPStackSlot());
2063 MemOperand dst = g.ToMemOperand(destination); 2063 MemOperand dst = g.ToMemOperand(destination);
2064 __ fmr(temp, src); 2064 __ fmr(temp, src);
2065 __ lfd(src, dst); 2065 __ lfd(src, dst);
2066 __ stfd(temp, dst); 2066 __ stfd(temp, dst);
2067 } 2067 }
2068 #if !V8_TARGET_ARCH_PPC64 2068 #if !V8_TARGET_ARCH_PPC64
2069 } else if (source->IsDoubleStackSlot()) { 2069 } else if (source->IsFPStackSlot()) {
2070 DCHECK(destination->IsDoubleStackSlot()); 2070 DCHECK(destination->IsFPStackSlot());
2071 DoubleRegister temp_0 = kScratchDoubleReg; 2071 DoubleRegister temp_0 = kScratchDoubleReg;
2072 DoubleRegister temp_1 = d0; 2072 DoubleRegister temp_1 = d0;
2073 MemOperand src = g.ToMemOperand(source); 2073 MemOperand src = g.ToMemOperand(source);
2074 MemOperand dst = g.ToMemOperand(destination); 2074 MemOperand dst = g.ToMemOperand(destination);
2075 __ lfd(temp_0, src); 2075 __ lfd(temp_0, src);
2076 __ lfd(temp_1, dst); 2076 __ lfd(temp_1, dst);
2077 __ stfd(temp_0, dst); 2077 __ stfd(temp_0, dst);
2078 __ stfd(temp_1, src); 2078 __ stfd(temp_1, src);
2079 #endif 2079 #endif
2080 } else { 2080 } else {
(...skipping 30 matching lines...) Expand all
2111 padding_size -= v8::internal::Assembler::kInstrSize; 2111 padding_size -= v8::internal::Assembler::kInstrSize;
2112 } 2112 }
2113 } 2113 }
2114 } 2114 }
2115 2115
2116 #undef __ 2116 #undef __
2117 2117
2118 } // namespace compiler 2118 } // namespace compiler
2119 } // namespace internal 2119 } // namespace internal
2120 } // namespace v8 2120 } // namespace v8
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