Subzero ARM: addProlog/addEpilogue -- share some code with x86.

Subzero ARM: addProlog/addEpilogue -- share some code with x86.

Split out some of the addProlog code from x86 and
reuse that for ARM. Mainly, the code that doesn't
concern preserved registers or stack arguments is split out.

ARM push and pop take a whole list of registers (not
necessarily consecutive, but should be in ascending order).
There is also "vpush" for callee-saved float/vector
registers but we do not handle that yet (the register
numbers for that have to be consecutive).

Enable some of the int-arg.ll tests, which relied on
addPrologue's finishArgumentLowering to pull from the
correct argument stack slot.

Test some of the frame pointer usage (push/pop) when
handling a variable sized alloca.

Also change the classification of LR, and PC so that
they are not "CalleeSave". We don't want to push LR
if it isn't overwritten by another call. It will certainly be
"used" by the return however. The prologue code only checks
if a CalleeSave register is used somewhere before deciding
to preserve it. We could make that stricter and check if
the register is also written to, but there are some
additional writes that are not visible till after the
push/pop are generated (e.g., copy from argument stack slot
to the argument register). Instead, keep checking use
only, and handle LR as a special case (IsLeafFunction).

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org

Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=0fa6c5a062f465360448a672abed3b916b413ca8

[jvoung (off chromium), 2015-05-29 15:34:10]

jvoung@chromium.org changed reviewers:
+ kschimpf@google.com, mtrofin@chromium.org, stichnot@chromium.org

[jvoung (off chromium), 2015-05-29 15:34:44]

https://codereview.chromium.org/1159013002/diff/80001/tests_lit/llvm2ice_test...
File tests_lit/llvm2ice_tests/branch-opt.ll (left):

https://codereview.chromium.org/1159013002/diff/80001/tests_lit/llvm2ice_test...
tests_lit/llvm2ice_tests/branch-opt.ll:96: ; ARM32O2-NEXT: bx lr
there's some popping now so I took away the next

[Jim Stichnoth, 2015-05-30 16:58:55]

otherwise lgtm

https://codereview.chromium.org/1159013002/diff/110001/src/IceInstARM32.cpp
File src/IceInstARM32.cpp (right):

https://codereview.chromium.org/1159013002/diff/110001/src/IceInstARM32.cpp#n...
src/IceInstARM32.cpp:265: // We only track the first Dest directly. Other Dests
should be
I think we should consider treating the Dests values more uniformly - leave
InstARM32Pop::Dest=nullptr, omit the HasSideEffects=true assignment, and add
FakeDef instructions for each Dests[] variable including Dest[0].

https://codereview.chromium.org/1159013002/diff/110001/src/IceTargetLowering.cpp
File src/IceTargetLowering.cpp (right):

https://codereview.chromium.org/1159013002/diff/110001/src/IceTargetLowering....
src/IceTargetLowering.cpp:249: // Sort the variables into buckets according to
the log of their width
I realize this is just code being moved around, but I think this method could be
simplified to this:

  Dest = Source;
  std::sort(Dest.begin(), Dest.end(),
            [this](const Variable *V1, const Variable *V2) {
    return typeWidthInBytesOnStack(V1->getType()) >
           typeWidthInBytesOnStack(V2->getType());
  });

And then methods maxStackSlotSizeLog2() and minStackSlotSizeLog2() could be
removed entirely.

But keep a comment suggesting a bucket sort if performance requires.

I ran some rough timings on my laptop against pnacl-llc.pexe, and couldn't see
any performance difference.

[jvoung (off chromium), 2015-06-01 18:00:23]

https://codereview.chromium.org/1159013002/diff/110001/src/IceInstARM32.cpp
File src/IceInstARM32.cpp (right):

https://codereview.chromium.org/1159013002/diff/110001/src/IceInstARM32.cpp#n...
src/IceInstARM32.cpp:265: // We only track the first Dest directly. Other Dests
should be
On 2015/05/30 16:58:54, stichnot wrote:
> I think we should consider treating the Dests values more uniformly - leave
> InstARM32Pop::Dest=nullptr, omit the HasSideEffects=true assignment, and add
> FakeDef instructions for each Dests[] variable including Dest[0].

Yeah that seems cleaner, and it's already storing the whole list locally w/
"Dests(Dests)". Done.

https://codereview.chromium.org/1159013002/diff/110001/src/IceTargetLowering.cpp
File src/IceTargetLowering.cpp (right):

https://codereview.chromium.org/1159013002/diff/110001/src/IceTargetLowering....
src/IceTargetLowering.cpp:249: // Sort the variables into buckets according to
the log of their width
On 2015/05/30 16:58:54, stichnot wrote:
> I realize this is just code being moved around, but I think this method could
be
> simplified to this:
> 
>   Dest = Source;
>   std::sort(Dest.begin(), Dest.end(),
>             [this](const Variable *V1, const Variable *V2) {
>     return typeWidthInBytesOnStack(V1->getType()) >
>            typeWidthInBytesOnStack(V2->getType());
>   });
> 
> And then methods maxStackSlotSizeLog2() and minStackSlotSizeLog2() could be
> removed entirely.
> 
> But keep a comment suggesting a bucket sort if performance requires.
> 
> I ran some rough timings on my laptop against pnacl-llc.pexe, and couldn't see
> any performance difference.

Done.

[jvoung (off chromium), 2015-06-01 18:04:12]

Committed patchset #9 (id:150001) manually as
0fa6c5a062f465360448a672abed3b916b413ca8 (tree was closed).