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Side by Side Diff: src/IceTargetLoweringARM32.h

Issue 1159013002: Subzero ARM: addProlog/addEpilogue -- share some code with x86. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: typo Created 5 years, 6 months ago
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1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the TargetLoweringARM32 class, which implements the 10 // This file declares the TargetLoweringARM32 class, which implements the
(...skipping 34 matching lines...) Expand 10 before | Expand all | Expand 10 after
45 } 45 }
46 bool hasFramePointer() const override { return UsesFramePointer; } 46 bool hasFramePointer() const override { return UsesFramePointer; }
47 SizeT getFrameOrStackReg() const override { 47 SizeT getFrameOrStackReg() const override {
48 return UsesFramePointer ? RegARM32::Reg_fp : RegARM32::Reg_sp; 48 return UsesFramePointer ? RegARM32::Reg_fp : RegARM32::Reg_sp;
49 } 49 }
50 size_t typeWidthInBytesOnStack(Type Ty) const override { 50 size_t typeWidthInBytesOnStack(Type Ty) const override {
51 // Round up to the next multiple of 4 bytes. In particular, i1, 51 // Round up to the next multiple of 4 bytes. In particular, i1,
52 // i8, and i16 are rounded up to 4 bytes. 52 // i8, and i16 are rounded up to 4 bytes.
53 return (typeWidthInBytes(Ty) + 3) & ~3; 53 return (typeWidthInBytes(Ty) + 3) & ~3;
54 } 54 }
55
55 void emitVariable(const Variable *Var) const override; 56 void emitVariable(const Variable *Var) const override;
56 57
57 const char *getConstantPrefix() const final { return "#"; } 58 const char *getConstantPrefix() const final { return "#"; }
58 void emit(const ConstantUndef *C) const final; 59 void emit(const ConstantUndef *C) const final;
59 void emit(const ConstantInteger32 *C) const final; 60 void emit(const ConstantInteger32 *C) const final;
60 void emit(const ConstantInteger64 *C) const final; 61 void emit(const ConstantInteger64 *C) const final;
61 void emit(const ConstantFloat *C) const final; 62 void emit(const ConstantFloat *C) const final;
62 void emit(const ConstantDouble *C) const final; 63 void emit(const ConstantDouble *C) const final;
63 64
64 void lowerArguments() override; 65 void lowerArguments() override;
65 void addProlog(CfgNode *Node) override; 66 void addProlog(CfgNode *Node) override;
66 void addEpilog(CfgNode *Node) override; 67 void addEpilog(CfgNode *Node) override;
67 68
68 // Ensure that a 64-bit Variable has been split into 2 32-bit 69 // Ensure that a 64-bit Variable has been split into 2 32-bit
69 // Variables, creating them if necessary. This is needed for all 70 // Variables, creating them if necessary. This is needed for all
70 // I64 operations. 71 // I64 operations.
71 void split64(Variable *Var); 72 void split64(Variable *Var);
72 Operand *loOperand(Operand *Operand); 73 Operand *loOperand(Operand *Operand);
73 Operand *hiOperand(Operand *Operand); 74 Operand *hiOperand(Operand *Operand);
75 void finishArgumentLowering(Variable *Arg, Variable *FramePtr,
76 size_t BasicFrameOffset, size_t &InArgsSizeBytes);
74 77
75 protected: 78 protected:
76 explicit TargetARM32(Cfg *Func); 79 explicit TargetARM32(Cfg *Func);
77 80
78 void postLower() override; 81 void postLower() override;
79 82
80 void lowerAlloca(const InstAlloca *Inst) override; 83 void lowerAlloca(const InstAlloca *Inst) override;
81 void lowerArithmetic(const InstArithmetic *Inst) override; 84 void lowerArithmetic(const InstArithmetic *Inst) override;
82 void lowerAssign(const InstAssign *Inst) override; 85 void lowerAssign(const InstAssign *Inst) override;
83 void lowerBr(const InstBr *Inst) override; 86 void lowerBr(const InstBr *Inst) override;
(...skipping 128 matching lines...) Expand 10 before | Expand all | Expand 10 after
212 Context.insert(InstARM32Mul::create(Func, Dest, Src0, Src1, Pred)); 215 Context.insert(InstARM32Mul::create(Func, Dest, Src0, Src1, Pred));
213 } 216 }
214 void _mvn(Variable *Dest, Operand *Src0, 217 void _mvn(Variable *Dest, Operand *Src0,
215 CondARM32::Cond Pred = CondARM32::AL) { 218 CondARM32::Cond Pred = CondARM32::AL) {
216 Context.insert(InstARM32Mvn::create(Func, Dest, Src0, Pred)); 219 Context.insert(InstARM32Mvn::create(Func, Dest, Src0, Pred));
217 } 220 }
218 void _orr(Variable *Dest, Variable *Src0, Operand *Src1, 221 void _orr(Variable *Dest, Variable *Src0, Operand *Src1,
219 CondARM32::Cond Pred = CondARM32::AL) { 222 CondARM32::Cond Pred = CondARM32::AL) {
220 Context.insert(InstARM32Orr::create(Func, Dest, Src0, Src1, Pred)); 223 Context.insert(InstARM32Orr::create(Func, Dest, Src0, Src1, Pred));
221 } 224 }
225 void _push(const VarList &Sources) {
226 Context.insert(InstARM32Push::create(Func, Sources));
227 }
228 void _pop(const VarList &Dests) {
229 Context.insert(InstARM32Pop::create(Func, Dests));
230 // Mark dests as modified.
231 for (Variable *Dest : Dests)
232 Context.insert(InstFakeDef::create(Func, Dest));
233 }
222 void _sbc(Variable *Dest, Variable *Src0, Operand *Src1, 234 void _sbc(Variable *Dest, Variable *Src0, Operand *Src1,
223 CondARM32::Cond Pred = CondARM32::AL) { 235 CondARM32::Cond Pred = CondARM32::AL) {
224 Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred)); 236 Context.insert(InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred));
225 } 237 }
226 void _sbcs(Variable *Dest, Variable *Src0, Operand *Src1, 238 void _sbcs(Variable *Dest, Variable *Src0, Operand *Src1,
227 CondARM32::Cond Pred = CondARM32::AL) { 239 CondARM32::Cond Pred = CondARM32::AL) {
228 const bool SetFlags = true; 240 const bool SetFlags = true;
229 Context.insert( 241 Context.insert(
230 InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred, SetFlags)); 242 InstARM32Sbc::create(Func, Dest, Src0, Src1, Pred, SetFlags));
231 } 243 }
(...skipping 14 matching lines...) Expand all
246 Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) { 258 Variable *Src1, CondARM32::Cond Pred = CondARM32::AL) {
247 Context.insert( 259 Context.insert(
248 InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1, Pred)); 260 InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1, Pred));
249 // Model the modification to the second dest as a fake def. 261 // Model the modification to the second dest as a fake def.
250 // Note that the def is not predicated. 262 // Note that the def is not predicated.
251 Context.insert(InstFakeDef::create(Func, DestHi, DestLo)); 263 Context.insert(InstFakeDef::create(Func, DestHi, DestLo));
252 } 264 }
253 265
254 bool UsesFramePointer; 266 bool UsesFramePointer;
255 bool NeedsStackAlignment; 267 bool NeedsStackAlignment;
268 bool MaybeLeafFunc;
269 size_t SpillAreaSizeBytes;
256 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; 270 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM];
257 llvm::SmallBitVector ScratchRegs; 271 llvm::SmallBitVector ScratchRegs;
258 llvm::SmallBitVector RegsUsed; 272 llvm::SmallBitVector RegsUsed;
259 VarList PhysicalRegisters[IceType_NUM]; 273 VarList PhysicalRegisters[IceType_NUM];
260 static IceString RegNames[]; 274 static IceString RegNames[];
261 275
262 private: 276 private:
263 ~TargetARM32() override {} 277 ~TargetARM32() override {}
264 }; 278 };
265 279
(...skipping 15 matching lines...) Expand all
281 295
282 private: 296 private:
283 void lowerGlobal(const VariableDeclaration &Var) const; 297 void lowerGlobal(const VariableDeclaration &Var) const;
284 ~TargetDataARM32() override {} 298 ~TargetDataARM32() override {}
285 template <typename T> static void emitConstantPool(GlobalContext *Ctx); 299 template <typename T> static void emitConstantPool(GlobalContext *Ctx);
286 }; 300 };
287 301
288 } // end of namespace Ice 302 } // end of namespace Ice
289 303
290 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H 304 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H
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