Implements unboxed Mints on ARM.

Implements unboxed Mints on ARM.

R=johnmccutchan@google.com, regis@google.com

Committed: https://code.google.com/p/dart/source/detail?r=34256

[regis, 2014-03-20 20:39:35]

LGTM

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/assembler_arm...
File runtime/vm/assembler_arm_test.cc (right):

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/assembler_arm...
runtime/vm/assembler_arm_test.cc:2784: __ vmovsr(S2, R1);  // S0 <- R1.
S2 <- R1

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/assembler_arm...
runtime/vm/assembler_arm_test.cc:2786: __ vmvnq(Q2, Q1);  // Q2 <- Q1.
~Q1

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:1094: __ eor(idx, idx,
ShifterOperand(idx));
Wouldn't __ LoadImmediate(idx, 0) be clearer?

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:1097: __ LoadImmediate(idx, -1, LT);
Instead of the 3 instructions above (including a branch), you could emit:
  __ Lsl(idx, TMP, 31);
  __ Asr(idx, idx, 31);

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:1105: __ eor(idx, idx,
ShifterOperand(idx));
Wouldn't __ LoadImmediate(idx, 0) be clearer?

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5379: __
vmovdrr(EvenDRegisterOf(result), value, temp);
Replace 3 instructions above with:
  __ Lsl(temp, value, 31);
  __ Asr(temp, temp, 31);

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5399: __ LoadImmediate(temp, -1, LT);
ditto

[Cutch, 2014-03-20 20:46:10]

lgtm, exciting!

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
File runtime/vm/intermediate_language_ia32.cc (right):

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_ia32.cc:5178: if (needs_temp) {
:)

[zra, 2014-03-20 23:49:25]

Thanks!

Will commit tomorrow, so I can be around to keep an eye on the waterfall.

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/assembler_arm...
File runtime/vm/assembler_arm_test.cc (right):

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/assembler_arm...
runtime/vm/assembler_arm_test.cc:2784: __ vmovsr(S2, R1);  // S0 <- R1.
On 2014/03/20 20:39:35, regis wrote:
> S2 <- R1

Done.

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/assembler_arm...
runtime/vm/assembler_arm_test.cc:2786: __ vmvnq(Q2, Q1);  // Q2 <- Q1.
On 2014/03/20 20:39:35, regis wrote:
> ~Q1

Done.

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:1094: __ eor(idx, idx,
ShifterOperand(idx));
On 2014/03/20 20:39:35, regis wrote:
> Wouldn't __ LoadImmediate(idx, 0) be clearer?

Done.

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:1097: __ LoadImmediate(idx, -1, LT);
On 2014/03/20 20:39:35, regis wrote:
> Instead of the 3 instructions above (including a branch), you could emit:
>   __ Lsl(idx, TMP, 31);
>   __ Asr(idx, idx, 31);

Done.

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:1105: __ eor(idx, idx,
ShifterOperand(idx));
On 2014/03/20 20:39:35, regis wrote:
> Wouldn't __ LoadImmediate(idx, 0) be clearer?

Done.

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5379: __
vmovdrr(EvenDRegisterOf(result), value, temp);
On 2014/03/20 20:39:35, regis wrote:
> Replace 3 instructions above with:
>   __ Lsl(temp, value, 31);
>   __ Asr(temp, temp, 31);

Done.

https://codereview.chromium.org/206503005/diff/20001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5399: __ LoadImmediate(temp, -1, LT);
On 2014/03/20 20:39:35, regis wrote:
> ditto

Done.

[Florian Schneider, 2014-03-21 10:33:50]

So we're not planning to use GP integer registers for 64-bit integer math after
all? Because if we do, then I don't see the purpose of this CL.

[zra, 2014-03-21 14:27:27]

On 2014/03/21 10:33:50, Florian Schneider wrote:
> So we're not planning to use GP integer registers for 64-bit integer math
after
> all? Because if we do, then I don't see the purpose of this CL.

John indicated that that change will take quite some time, and that it might not
even translate well over to ARM. In the meantime, this change improves
performance quite a bit, and will provide a base for John to attempt translating
his changes on ia32 over to ARM.

[zra, 2014-03-21 16:26:26]

Committed patchset #4 manually as r34256 (presubmit successful).