| Index: runtime/vm/assembler_arm.cc
|
| ===================================================================
|
| --- runtime/vm/assembler_arm.cc (revision 34252)
|
| +++ runtime/vm/assembler_arm.cc (working copy)
|
| @@ -1223,6 +1223,18 @@
|
| }
|
|
|
|
|
| +void Assembler::vshlqi(OperandSize sz,
|
| + QRegister qd, QRegister qm, QRegister qn) {
|
| + EmitSIMDqqq(B25 | B10, sz, qd, qn, qm);
|
| +}
|
| +
|
| +
|
| +void Assembler::vshlqu(OperandSize sz,
|
| + QRegister qd, QRegister qm, QRegister qn) {
|
| + EmitSIMDqqq(B25 | B24 | B10, sz, qd, qn, qm);
|
| +}
|
| +
|
| +
|
| void Assembler::veorq(QRegister qd, QRegister qn, QRegister qm) {
|
| EmitSIMDqqq(B24 | B8 | B4, kByte, qd, qn, qm);
|
| }
|
| @@ -1243,6 +1255,11 @@
|
| }
|
|
|
|
|
| +void Assembler::vmvnq(QRegister qd, QRegister qm) {
|
| + EmitSIMDqqq(B25 | B24 | B23 | B10 | B8 | B7, kWordPair, qd, Q0, qm);
|
| +}
|
| +
|
| +
|
| void Assembler::vminqs(QRegister qd, QRegister qn, QRegister qm) {
|
| EmitSIMDqqq(B21 | B11 | B10 | B9 | B8, kSWord, qd, qn, qm);
|
| }
|
|
|