OLD | NEW |
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
(...skipping 1205 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1216 QRegister qd, QRegister qn, QRegister qm) { | 1216 QRegister qd, QRegister qn, QRegister qm) { |
1217 EmitSIMDqqq(B11 | B8 | B4, sz, qd, qn, qm); | 1217 EmitSIMDqqq(B11 | B8 | B4, sz, qd, qn, qm); |
1218 } | 1218 } |
1219 | 1219 |
1220 | 1220 |
1221 void Assembler::vmulqs(QRegister qd, QRegister qn, QRegister qm) { | 1221 void Assembler::vmulqs(QRegister qd, QRegister qn, QRegister qm) { |
1222 EmitSIMDqqq(B24 | B11 | B10 | B8 | B4, kSWord, qd, qn, qm); | 1222 EmitSIMDqqq(B24 | B11 | B10 | B8 | B4, kSWord, qd, qn, qm); |
1223 } | 1223 } |
1224 | 1224 |
1225 | 1225 |
| 1226 void Assembler::vshlqi(OperandSize sz, |
| 1227 QRegister qd, QRegister qm, QRegister qn) { |
| 1228 EmitSIMDqqq(B25 | B10, sz, qd, qn, qm); |
| 1229 } |
| 1230 |
| 1231 |
| 1232 void Assembler::vshlqu(OperandSize sz, |
| 1233 QRegister qd, QRegister qm, QRegister qn) { |
| 1234 EmitSIMDqqq(B25 | B24 | B10, sz, qd, qn, qm); |
| 1235 } |
| 1236 |
| 1237 |
1226 void Assembler::veorq(QRegister qd, QRegister qn, QRegister qm) { | 1238 void Assembler::veorq(QRegister qd, QRegister qn, QRegister qm) { |
1227 EmitSIMDqqq(B24 | B8 | B4, kByte, qd, qn, qm); | 1239 EmitSIMDqqq(B24 | B8 | B4, kByte, qd, qn, qm); |
1228 } | 1240 } |
1229 | 1241 |
1230 | 1242 |
1231 void Assembler::vorrq(QRegister qd, QRegister qn, QRegister qm) { | 1243 void Assembler::vorrq(QRegister qd, QRegister qn, QRegister qm) { |
1232 EmitSIMDqqq(B21 | B8 | B4, kByte, qd, qn, qm); | 1244 EmitSIMDqqq(B21 | B8 | B4, kByte, qd, qn, qm); |
1233 } | 1245 } |
1234 | 1246 |
1235 | 1247 |
1236 void Assembler::vornq(QRegister qd, QRegister qn, QRegister qm) { | 1248 void Assembler::vornq(QRegister qd, QRegister qn, QRegister qm) { |
1237 EmitSIMDqqq(B21 | B20 | B8 | B4, kByte, qd, qn, qm); | 1249 EmitSIMDqqq(B21 | B20 | B8 | B4, kByte, qd, qn, qm); |
1238 } | 1250 } |
1239 | 1251 |
1240 | 1252 |
1241 void Assembler::vandq(QRegister qd, QRegister qn, QRegister qm) { | 1253 void Assembler::vandq(QRegister qd, QRegister qn, QRegister qm) { |
1242 EmitSIMDqqq(B8 | B4, kByte, qd, qn, qm); | 1254 EmitSIMDqqq(B8 | B4, kByte, qd, qn, qm); |
1243 } | 1255 } |
1244 | 1256 |
1245 | 1257 |
| 1258 void Assembler::vmvnq(QRegister qd, QRegister qm) { |
| 1259 EmitSIMDqqq(B25 | B24 | B23 | B10 | B8 | B7, kWordPair, qd, Q0, qm); |
| 1260 } |
| 1261 |
| 1262 |
1246 void Assembler::vminqs(QRegister qd, QRegister qn, QRegister qm) { | 1263 void Assembler::vminqs(QRegister qd, QRegister qn, QRegister qm) { |
1247 EmitSIMDqqq(B21 | B11 | B10 | B9 | B8, kSWord, qd, qn, qm); | 1264 EmitSIMDqqq(B21 | B11 | B10 | B9 | B8, kSWord, qd, qn, qm); |
1248 } | 1265 } |
1249 | 1266 |
1250 | 1267 |
1251 void Assembler::vmaxqs(QRegister qd, QRegister qn, QRegister qm) { | 1268 void Assembler::vmaxqs(QRegister qd, QRegister qn, QRegister qm) { |
1252 EmitSIMDqqq(B11 | B10 | B9 | B8, kSWord, qd, qn, qm); | 1269 EmitSIMDqqq(B11 | B10 | B9 | B8, kSWord, qd, qn, qm); |
1253 } | 1270 } |
1254 | 1271 |
1255 | 1272 |
(...skipping 1660 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2916 | 2933 |
2917 | 2934 |
2918 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 2935 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
2919 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 2936 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
2920 return fpu_reg_names[reg]; | 2937 return fpu_reg_names[reg]; |
2921 } | 2938 } |
2922 | 2939 |
2923 } // namespace dart | 2940 } // namespace dart |
2924 | 2941 |
2925 #endif // defined TARGET_ARCH_ARM | 2942 #endif // defined TARGET_ARCH_ARM |
OLD | NEW |