Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(247)

Side by Side Diff: runtime/vm/disassembler_arm.cc

Issue 206503005: Implements unboxed Mints on ARM. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: merge Created 6 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « runtime/vm/assembler_arm_test.cc ('k') | runtime/vm/flow_graph_compiler_arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/disassembler.h" 5 #include "vm/disassembler.h"
6 6
7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM.
8 #if defined(TARGET_ARCH_ARM) 8 #if defined(TARGET_ARCH_ARM)
9 #include "platform/assert.h" 9 #include "platform/assert.h"
10 10
(...skipping 1304 matching lines...) Expand 10 before | Expand all | Expand 10 after
1315 Format(instr, "vsubq'sz 'qd, 'qn, 'qm"); 1315 Format(instr, "vsubq'sz 'qd, 'qn, 'qm");
1316 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) && 1316 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) &&
1317 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) { 1317 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) {
1318 Format(instr, "vsubqs 'qd, 'qn, 'qm"); 1318 Format(instr, "vsubqs 'qd, 'qn, 'qm");
1319 } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) && 1319 } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) &&
1320 (instr->Bits(23, 2) == 0)) { 1320 (instr->Bits(23, 2) == 0)) {
1321 Format(instr, "vmulq'sz 'qd, 'qn, 'qm"); 1321 Format(instr, "vmulq'sz 'qd, 'qn, 'qm");
1322 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) && 1322 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) &&
1323 (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) { 1323 (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) {
1324 Format(instr, "vmulqs 'qd, 'qn, 'qm"); 1324 Format(instr, "vmulqs 'qd, 'qn, 'qm");
1325 } else if ((instr->Bits(8, 4) == 4) && (instr->Bit(4) == 0) &&
1326 (instr->Bits(23, 5) == 4)) {
1327 Format(instr, "vshlqi'sz 'qd, 'qm, 'qn");
1328 } else if ((instr->Bits(8, 4) == 4) && (instr->Bit(4) == 0) &&
1329 (instr->Bits(23, 5) == 6)) {
1330 Format(instr, "vshlqu'sz 'qd, 'qm, 'qn");
1325 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) && 1331 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
1326 (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 2)) { 1332 (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 2)) {
1327 Format(instr, "veorq 'qd, 'qn, 'qm"); 1333 Format(instr, "veorq 'qd, 'qn, 'qm");
1328 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) && 1334 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
1329 (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 0)) { 1335 (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 0)) {
1330 Format(instr, "vornq 'qd, 'qn, 'qm"); 1336 Format(instr, "vornq 'qd, 'qn, 'qm");
1331 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) && 1337 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
1332 (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) { 1338 (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) {
1333 if (instr->QmField() == instr->QnField()) { 1339 if (instr->QmField() == instr->QnField()) {
1334 Format(instr, "vmovq 'qd, 'qm"); 1340 Format(instr, "vmovq 'qd, 'qm");
1335 } else { 1341 } else {
1336 Format(instr, "vorrq 'qd, 'qm"); 1342 Format(instr, "vorrq 'qd, 'qm");
1337 } 1343 }
1338 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) && 1344 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
1339 (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) { 1345 (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {
1340 Format(instr, "vandq 'qd, 'qn, 'qm"); 1346 Format(instr, "vandq 'qd, 'qn, 'qm");
1347 } else if ((instr->Bits(7, 5) == 11) && (instr->Bit(4) == 0) &&
1348 (instr->Bits(20, 2) == 3) && (instr->Bits(23, 5) == 7) &&
1349 (instr->Bits(16, 4) == 0)) {
1350 Format(instr, "vmvnq 'qd, 'qm");
1341 } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) && 1351 } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) &&
1342 (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) { 1352 (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) {
1343 Format(instr, "vminqs 'qd, 'qn, 'qm"); 1353 Format(instr, "vminqs 'qd, 'qn, 'qm");
1344 } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) && 1354 } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) &&
1345 (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) { 1355 (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {
1346 Format(instr, "vmaxqs 'qd, 'qn, 'qm"); 1356 Format(instr, "vmaxqs 'qd, 'qn, 'qm");
1347 } else if ((instr->Bits(8, 4) == 7) && (instr->Bit(4) == 0) && 1357 } else if ((instr->Bits(8, 4) == 7) && (instr->Bit(4) == 0) &&
1348 (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) && 1358 (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
1349 (instr->Bit(7) == 0) && (instr->Bits(16, 4) == 9)) { 1359 (instr->Bit(7) == 0) && (instr->Bits(16, 4) == 9)) {
1350 Format(instr, "vabsqs 'qd, 'qm"); 1360 Format(instr, "vabsqs 'qd, 'qm");
(...skipping 165 matching lines...) Expand 10 before | Expand all | Expand 10 after
1516 human_buffer, 1526 human_buffer,
1517 sizeof(human_buffer), 1527 sizeof(human_buffer),
1518 pc); 1528 pc);
1519 pc += instruction_length; 1529 pc += instruction_length;
1520 } 1530 }
1521 } 1531 }
1522 1532
1523 } // namespace dart 1533 } // namespace dart
1524 1534
1525 #endif // defined TARGET_ARCH_ARM 1535 #endif // defined TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « runtime/vm/assembler_arm_test.cc ('k') | runtime/vm/flow_graph_compiler_arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698