Unify MachineType and RepType.

src/compiler/arm64/instruction-selector-arm64.cc

Index: src/compiler/arm64/instruction-selector-arm64.cc
diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc
index 111ca2d956a17e846b64006756e01d41825d6c66..9574e7724b785f9aa9d0093948e76d961b07addf 100644
--- a/src/compiler/arm64/instruction-selector-arm64.cc
+++ b/src/compiler/arm64/instruction-selector-arm64.cc
@@ -150,31 +150,32 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
 
 
 void InstructionSelector::VisitLoad(Node* node) {
-  MachineType rep = OpParameter<MachineType>(node);
+  MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
-  InstructionOperand* result = rep == kMachineFloat64
-                                   ? g.DefineAsDoubleRegister(node)
-                                   : g.DefineAsRegister(node);
+  InstructionOperand* result = rep == rFloat64 ? g.DefineAsDoubleRegister(node)
+                                               : g.DefineAsRegister(node);
 
   ArchOpcode opcode;
+  // TODO(titzer): signed/unsigned small loads
   switch (rep) {
-    case kMachineFloat64:
+    case rFloat64:
       opcode = kArm64Float64Load;
       break;
-    case kMachineWord8:
+    case rBit:  // Fall through.
+    case rWord8:
       opcode = kArm64LoadWord8;
       break;
-    case kMachineWord16:
+    case rWord16:
       opcode = kArm64LoadWord16;
       break;
-    case kMachineWord32:
+    case rWord32:
       opcode = kArm64LoadWord32;
       break;
-    case kMachineTagged:  // Fall through.
-    case kMachineWord64:
+    case rTagged:  // Fall through.
+    case rWord64:
       opcode = kArm64LoadWord64;
       break;
     default:
@@ -201,9 +202,9 @@ void InstructionSelector::VisitStore(Node* node) {
   Node* value = node->InputAt(2);
 
   StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
-  MachineType rep = store_rep.rep;
+  MachineType rep = RepresentationOf(store_rep.machine_type);
   if (store_rep.write_barrier_kind == kFullWriteBarrier) {
-    DCHECK(rep == kMachineTagged);
+    DCHECK(rep == rTagged);
     // TODO(dcarney): refactor RecordWrite function to take temp registers
     //                and pass them here instead of using fixed regs
     // TODO(dcarney): handle immediate indices.
@@ -215,27 +216,28 @@ void InstructionSelector::VisitStore(Node* node) {
   }
   DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
   InstructionOperand* val;
-  if (rep == kMachineFloat64) {
+  if (rep == rFloat64) {
     val = g.UseDoubleRegister(value);
   } else {
     val = g.UseRegister(value);
   }
   ArchOpcode opcode;
   switch (rep) {
-    case kMachineFloat64:
+    case rFloat64:
       opcode = kArm64Float64Store;
       break;
-    case kMachineWord8:
+    case rBit:  // Fall through.
+    case rWord8:
       opcode = kArm64StoreWord8;
       break;
-    case kMachineWord16:
+    case rWord16:
       opcode = kArm64StoreWord16;
       break;
-    case kMachineWord32:
+    case rWord32:
       opcode = kArm64StoreWord32;
       break;
-    case kMachineTagged:  // Fall through.
-    case kMachineWord64:
+    case rTagged:  // Fall through.
+    case rWord64:
       opcode = kArm64StoreWord64;
       break;
     default: