Unify MachineType and RepType.

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 132 matching lines @@
 
 // Shared routine for multiple binary operations.
 static void VisitBinop(InstructionSelector* selector, Node* node,
                        ArchOpcode opcode, ImmediateMode operand_mode) {
   FlagsContinuation cont;
   VisitBinop(selector, node, opcode, operand_mode, &cont);
 }
 
 
 void InstructionSelector::VisitLoad(Node* node) {
-  MachineType rep = OpParameter<MachineType>(node);
+  MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
-  InstructionOperand* result = rep == kMachineFloat64
-                                   ? g.DefineAsDoubleRegister(node)
-                                   : g.DefineAsRegister(node);
+  InstructionOperand* result = rep == rFloat64 ? g.DefineAsDoubleRegister(node)
+                                               : g.DefineAsRegister(node);
 
   ArchOpcode opcode;
+  // TODO(titzer): signed/unsigned small loads
   switch (rep) {
-    case kMachineFloat64:
+    case rFloat64:
       opcode = kArm64Float64Load;
       break;
-    case kMachineWord8:
+    case rBit:  // Fall through.
+    case rWord8:
       opcode = kArm64LoadWord8;
       break;
-    case kMachineWord16:
+    case rWord16:
       opcode = kArm64LoadWord16;
       break;
-    case kMachineWord32:
+    case rWord32:
       opcode = kArm64LoadWord32;
       break;
-    case kMachineTagged:  // Fall through.
-    case kMachineWord64:
+    case rTagged:  // Fall through.
+    case rWord64:
       opcode = kArm64LoadWord64;
       break;
     default:
       UNREACHABLE();
       return;
   }
   if (g.CanBeImmediate(index, kLoadStoreImm)) {
     Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
          g.UseRegister(base), g.UseImmediate(index));
   } else if (g.CanBeImmediate(base, kLoadStoreImm)) {
     Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
          g.UseRegister(index), g.UseImmediate(base));
   } else {
     Emit(opcode | AddressingModeField::encode(kMode_MRR), result,
          g.UseRegister(base), g.UseRegister(index));
   }
 }
 
 
 void InstructionSelector::VisitStore(Node* node) {
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
   Node* value = node->InputAt(2);
 
   StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
-  MachineType rep = store_rep.rep;
+  MachineType rep = RepresentationOf(store_rep.machine_type);
   if (store_rep.write_barrier_kind == kFullWriteBarrier) {
-    DCHECK(rep == kMachineTagged);
+    DCHECK(rep == rTagged);
     // TODO(dcarney): refactor RecordWrite function to take temp registers
     //                and pass them here instead of using fixed regs
     // TODO(dcarney): handle immediate indices.
     InstructionOperand* temps[] = {g.TempRegister(x11), g.TempRegister(x12)};
     Emit(kArm64StoreWriteBarrier, NULL, g.UseFixed(base, x10),
          g.UseFixed(index, x11), g.UseFixed(value, x12), ARRAY_SIZE(temps),
          temps);
     return;
   }
   DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
   InstructionOperand* val;
-  if (rep == kMachineFloat64) {
+  if (rep == rFloat64) {
     val = g.UseDoubleRegister(value);
   } else {
     val = g.UseRegister(value);
   }
   ArchOpcode opcode;
   switch (rep) {
-    case kMachineFloat64:
+    case rFloat64:
       opcode = kArm64Float64Store;
       break;
-    case kMachineWord8:
+    case rBit:  // Fall through.
+    case rWord8:
       opcode = kArm64StoreWord8;
       break;
-    case kMachineWord16:
+    case rWord16:
       opcode = kArm64StoreWord16;
       break;
-    case kMachineWord32:
+    case rWord32:
       opcode = kArm64StoreWord32;
       break;
-    case kMachineTagged:  // Fall through.
-    case kMachineWord64:
+    case rTagged:  // Fall through.
+    case rWord64:
       opcode = kArm64StoreWord64;
       break;
     default:
       UNREACHABLE();
       return;
   }
   if (g.CanBeImmediate(index, kLoadStoreImm)) {
     Emit(opcode | AddressingModeField::encode(kMode_MRI), NULL,
          g.UseRegister(base), g.UseImmediate(index), val);
   } else if (g.CanBeImmediate(base, kLoadStoreImm)) {
@@ skipping 409 matching lines @@
   // Caller clean up of stack for C-style calls.
   if (is_c_frame && aligned_push_count > 0) {
     DCHECK(deoptimization == NULL && continuation == NULL);
     Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8