MIPS64: Add support for architecture revision 6.

MIPS64: Add support for architecture revision 6.

TEST=
BUG=
R=jkummerow@chromium.org, paul.lind@imgtec.com

Committed: https://code.google.com/p/v8/source/detail?r=22681

[Jakob Kummerow, 2014-07-29 11:52:29]

Changes in non-MIPS-specific files LGTM.

[paul.l..., 2014-07-29 14:58:04]

Looks very good, mostly my comments are about nits, but there is one real issue
with jr/jalr() I think.

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64.cc
File src/mips64/assembler-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64....
src/mips64/assembler-mips64.cc:1392: jalr(rs, at);
I think this should be jalr(rs, zero_reg)

Also, jalr() itself does the WriteRecordedPositions() and the
BlockTrampolinePoolFor(1) so you should probably rearrange the if statement to
exclude those.

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64....
src/mips64/assembler-mips64.cc:1911: GenInstrImmediate(LUI, rs, rt, j);
A comment here about LUI/AUI and zero_reg would be helpful, though I suppose one
could just look at previous instruction ;)

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64....
src/mips64/assembler-mips64.cc:2521: ASSERT(is_uint3(cc));
Maybe ASSERT(kArchVariant != kMips64r6) here?

https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64.h
File src/mips64/constants-mips64.h (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64....
src/mips64/constants-mips64.h:20: kMips64r1,
I do not think we need kMips64r1 -- there are only 2 other usages, and it seems
they can be skipped.

https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64....
src/mips64/constants-mips64.h:419: MUL_MUH   =   ((3 << 3) + 0),  // MUL,  MUH.
nit: one space after MUL,

https://codereview.chromium.org/426863006/diff/1/src/mips64/disasm-mips64.cc
File src/mips64/disasm-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/disasm-mips64.cc#...
src/mips64/disasm-mips64.cc:675: case D_MUL_MUH:  // Eqauls to DMUL.
nit: Eqauls ->  Equals

https://codereview.chromium.org/426863006/diff/1/src/mips64/macro-assembler-m...
File src/mips64/macro-assembler-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/macro-assembler-m...
src/mips64/macro-assembler-mips64.cc:761: // dmul(rd, rs, rt.rm());
I think we can now remove this TODO, and the one just below.

https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64.cc
File src/mips64/simulator-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64....
src/mips64/simulator-mips64.cc:2086: case MULT:  // MULT == D_MUL_MUH
nit: end comment with period, here and DMULT below.

https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64....
src/mips64/simulator-mips64.cc:2660: case DMULT:  // DMULT == D_MUL_MUH
nit: trailing period on comment.

[dusmil.imgtec, 2014-07-29 17:39:12]

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64.cc
File src/mips64/assembler-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64....
src/mips64/assembler-mips64.cc:1392: jalr(rs, at);
On 2014/07/29 14:58:04, paul.l... wrote:
> I think this should be jalr(rs, zero_reg)
> 
> Also, jalr() itself does the WriteRecordedPositions() and the
> BlockTrampolinePoolFor(1) so you should probably rearrange the if statement to
> exclude those.

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64....
src/mips64/assembler-mips64.cc:1911: GenInstrImmediate(LUI, rs, rt, j);
On 2014/07/29 14:58:04, paul.l... wrote:
> A comment here about LUI/AUI and zero_reg would be helpful, though I suppose
one
> could just look at previous instruction ;)

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/assembler-mips64....
src/mips64/assembler-mips64.cc:2521: ASSERT(is_uint3(cc));
On 2014/07/29 14:58:04, paul.l... wrote:
> Maybe ASSERT(kArchVariant != kMips64r6) here?

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64.h
File src/mips64/constants-mips64.h (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64....
src/mips64/constants-mips64.h:20: kMips64r1,
On 2014/07/29 14:58:04, paul.l... wrote:
> I do not think we need kMips64r1 -- there are only 2 other usages, and it
seems
> they can be skipped.

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64....
src/mips64/constants-mips64.h:20: kMips64r1,
I agree. I removed kLoongson also, newer versions of it is Mips64r2 compliant.

https://codereview.chromium.org/426863006/diff/1/src/mips64/constants-mips64....
src/mips64/constants-mips64.h:419: MUL_MUH   =   ((3 << 3) + 0),  // MUL,  MUH.
On 2014/07/29 14:58:04, paul.l... wrote:
> nit: one space after MUL,

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/disasm-mips64.cc
File src/mips64/disasm-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/disasm-mips64.cc#...
src/mips64/disasm-mips64.cc:675: case D_MUL_MUH:  // Eqauls to DMUL.
On 2014/07/29 14:58:04, paul.l... wrote:
> nit: Eqauls ->  Equals

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/macro-assembler-m...
File src/mips64/macro-assembler-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/macro-assembler-m...
src/mips64/macro-assembler-mips64.cc:761: // dmul(rd, rs, rt.rm());
On 2014/07/29 14:58:04, paul.l... wrote:
> I think we can now remove this TODO, and the one just below.

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64.cc
File src/mips64/simulator-mips64.cc (right):

https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64....
src/mips64/simulator-mips64.cc:2086: case MULT:  // MULT == D_MUL_MUH
On 2014/07/29 14:58:04, paul.l... wrote:
> nit: end comment with period, here and DMULT below.

Done.

https://codereview.chromium.org/426863006/diff/1/src/mips64/simulator-mips64....
src/mips64/simulator-mips64.cc:2660: case DMULT:  // DMULT == D_MUL_MUH
On 2014/07/29 14:58:04, paul.l... wrote:
> nit: trailing period on comment.

Done.

[paul.l..., 2014-07-29 17:50:02]

LGTM.

[dusmil.imgtec, 2014-07-29 18:02:43]

Committed patchset #3 manually as r22681 (presubmit successful).