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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_MIPS_CONSTANTS_H_ | 5 #ifndef V8_MIPS_CONSTANTS_H_ |
6 #define V8_MIPS_CONSTANTS_H_ | 6 #define V8_MIPS_CONSTANTS_H_ |
7 | 7 |
8 // UNIMPLEMENTED_ macro for MIPS. | 8 // UNIMPLEMENTED_ macro for MIPS. |
9 #ifdef DEBUG | 9 #ifdef DEBUG |
10 #define UNIMPLEMENTED_MIPS() \ | 10 #define UNIMPLEMENTED_MIPS() \ |
11 v8::internal::PrintF("%s, \tline %d: \tfunction %s not implemented. \n", \ | 11 v8::internal::PrintF("%s, \tline %d: \tfunction %s not implemented. \n", \ |
12 __FILE__, __LINE__, __func__) | 12 __FILE__, __LINE__, __func__) |
13 #else | 13 #else |
14 #define UNIMPLEMENTED_MIPS() | 14 #define UNIMPLEMENTED_MIPS() |
15 #endif | 15 #endif |
16 | 16 |
17 #define UNSUPPORTED_MIPS() v8::internal::PrintF("Unsupported instruction.\n") | 17 #define UNSUPPORTED_MIPS() v8::internal::PrintF("Unsupported instruction.\n") |
18 | 18 |
19 enum ArchVariants { | 19 enum ArchVariants { |
20 kMips32r2, | 20 kMips64r1, |
paul.l...
2014/07/29 14:58:04
I do not think we need kMips64r1 -- there are only
dusmil.imgtec
2014/07/29 17:39:12
I agree. I removed kLoongson also, newer versions
dusmil.imgtec
2014/07/29 17:39:12
Done.
| |
21 kMips32r1, | 21 kMips64r2, |
22 kLoongson, | 22 kLoongson, |
23 kMips64r2 | 23 kMips64r6 |
24 }; | 24 }; |
25 | 25 |
26 | 26 |
27 #ifdef _MIPS_ARCH_MIPS64R2 | 27 #ifdef _MIPS_ARCH_MIPS64R2 |
28 static const ArchVariants kArchVariant = kMips64r2; | 28 static const ArchVariants kArchVariant = kMips64r2; |
29 #elif _MIPS_ARCH_MIPS64R6 | |
30 static const ArchVariants kArchVariant = kMips64r6; | |
29 #elif _MIPS_ARCH_LOONGSON | 31 #elif _MIPS_ARCH_LOONGSON |
30 // The loongson flag refers to the LOONGSON architectures based on MIPS-III, | 32 // The loongson flag refers to the LOONGSON architectures based on MIPS-III, |
31 // which predates (and is a subset of) the mips32r2 and r1 architectures. | 33 // which predates (and is a subset of) the mips32r2 and r1 architectures. |
32 static const ArchVariants kArchVariant = kLoongson; | 34 static const ArchVariants kArchVariant = kLoongson; |
33 #else | 35 #else |
34 static const ArchVariants kArchVariant = kMips64r1; | 36 static const ArchVariants kArchVariant = kMips64r1; |
35 #endif | 37 #endif |
36 | 38 |
37 | 39 |
38 // TODO(plind): consider deriving ABI from compiler flags or build system. | 40 // TODO(plind): consider deriving ABI from compiler flags or build system. |
(...skipping 182 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
221 const int kRdShift = 11; | 223 const int kRdShift = 11; |
222 const int kRdBits = 5; | 224 const int kRdBits = 5; |
223 const int kSaShift = 6; | 225 const int kSaShift = 6; |
224 const int kSaBits = 5; | 226 const int kSaBits = 5; |
225 const int kFunctionShift = 0; | 227 const int kFunctionShift = 0; |
226 const int kFunctionBits = 6; | 228 const int kFunctionBits = 6; |
227 const int kLuiShift = 16; | 229 const int kLuiShift = 16; |
228 | 230 |
229 const int kImm16Shift = 0; | 231 const int kImm16Shift = 0; |
230 const int kImm16Bits = 16; | 232 const int kImm16Bits = 16; |
233 const int kImm21Shift = 0; | |
234 const int kImm21Bits = 21; | |
231 const int kImm26Shift = 0; | 235 const int kImm26Shift = 0; |
232 const int kImm26Bits = 26; | 236 const int kImm26Bits = 26; |
233 const int kImm28Shift = 0; | 237 const int kImm28Shift = 0; |
234 const int kImm28Bits = 28; | 238 const int kImm28Bits = 28; |
235 const int kImm32Shift = 0; | 239 const int kImm32Shift = 0; |
236 const int kImm32Bits = 32; | 240 const int kImm32Bits = 32; |
237 | 241 |
238 // In branches and jumps immediate fields point to words, not bytes, | 242 // In branches and jumps immediate fields point to words, not bytes, |
239 // and are therefore shifted by 2. | 243 // and are therefore shifted by 2. |
240 const int kImmFieldShift = 2; | 244 const int kImmFieldShift = 2; |
(...skipping 47 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
288 BLEZ = ((0 << 3) + 6) << kOpcodeShift, | 292 BLEZ = ((0 << 3) + 6) << kOpcodeShift, |
289 BGTZ = ((0 << 3) + 7) << kOpcodeShift, | 293 BGTZ = ((0 << 3) + 7) << kOpcodeShift, |
290 | 294 |
291 ADDI = ((1 << 3) + 0) << kOpcodeShift, | 295 ADDI = ((1 << 3) + 0) << kOpcodeShift, |
292 ADDIU = ((1 << 3) + 1) << kOpcodeShift, | 296 ADDIU = ((1 << 3) + 1) << kOpcodeShift, |
293 SLTI = ((1 << 3) + 2) << kOpcodeShift, | 297 SLTI = ((1 << 3) + 2) << kOpcodeShift, |
294 SLTIU = ((1 << 3) + 3) << kOpcodeShift, | 298 SLTIU = ((1 << 3) + 3) << kOpcodeShift, |
295 ANDI = ((1 << 3) + 4) << kOpcodeShift, | 299 ANDI = ((1 << 3) + 4) << kOpcodeShift, |
296 ORI = ((1 << 3) + 5) << kOpcodeShift, | 300 ORI = ((1 << 3) + 5) << kOpcodeShift, |
297 XORI = ((1 << 3) + 6) << kOpcodeShift, | 301 XORI = ((1 << 3) + 6) << kOpcodeShift, |
298 LUI = ((1 << 3) + 7) << kOpcodeShift, | 302 LUI = ((1 << 3) + 7) << kOpcodeShift, // LUI/AUI family. |
303 DAUI = ((3 << 3) + 5) << kOpcodeShift, | |
299 | 304 |
305 BEQC = ((2 << 3) + 0) << kOpcodeShift, | |
300 COP1 = ((2 << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. | 306 COP1 = ((2 << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. |
301 BEQL = ((2 << 3) + 4) << kOpcodeShift, | 307 BEQL = ((2 << 3) + 4) << kOpcodeShift, |
302 BNEL = ((2 << 3) + 5) << kOpcodeShift, | 308 BNEL = ((2 << 3) + 5) << kOpcodeShift, |
303 BLEZL = ((2 << 3) + 6) << kOpcodeShift, | 309 BLEZL = ((2 << 3) + 6) << kOpcodeShift, |
304 BGTZL = ((2 << 3) + 7) << kOpcodeShift, | 310 BGTZL = ((2 << 3) + 7) << kOpcodeShift, |
305 | 311 |
306 DADDI = ((3 << 3) + 0) << kOpcodeShift, | 312 DADDI = ((3 << 3) + 0) << kOpcodeShift, // This is also BNEC. |
307 DADDIU = ((3 << 3) + 1) << kOpcodeShift, | 313 DADDIU = ((3 << 3) + 1) << kOpcodeShift, |
308 LDL = ((3 << 3) + 2) << kOpcodeShift, | 314 LDL = ((3 << 3) + 2) << kOpcodeShift, |
309 LDR = ((3 << 3) + 3) << kOpcodeShift, | 315 LDR = ((3 << 3) + 3) << kOpcodeShift, |
310 SPECIAL2 = ((3 << 3) + 4) << kOpcodeShift, | 316 SPECIAL2 = ((3 << 3) + 4) << kOpcodeShift, |
311 SPECIAL3 = ((3 << 3) + 7) << kOpcodeShift, | 317 SPECIAL3 = ((3 << 3) + 7) << kOpcodeShift, |
312 | 318 |
313 LB = ((4 << 3) + 0) << kOpcodeShift, | 319 LB = ((4 << 3) + 0) << kOpcodeShift, |
314 LH = ((4 << 3) + 1) << kOpcodeShift, | 320 LH = ((4 << 3) + 1) << kOpcodeShift, |
315 LWL = ((4 << 3) + 2) << kOpcodeShift, | 321 LWL = ((4 << 3) + 2) << kOpcodeShift, |
316 LW = ((4 << 3) + 3) << kOpcodeShift, | 322 LW = ((4 << 3) + 3) << kOpcodeShift, |
317 LBU = ((4 << 3) + 4) << kOpcodeShift, | 323 LBU = ((4 << 3) + 4) << kOpcodeShift, |
318 LHU = ((4 << 3) + 5) << kOpcodeShift, | 324 LHU = ((4 << 3) + 5) << kOpcodeShift, |
319 LWR = ((4 << 3) + 6) << kOpcodeShift, | 325 LWR = ((4 << 3) + 6) << kOpcodeShift, |
320 LWU = ((4 << 3) + 7) << kOpcodeShift, | 326 LWU = ((4 << 3) + 7) << kOpcodeShift, |
321 | 327 |
322 SB = ((5 << 3) + 0) << kOpcodeShift, | 328 SB = ((5 << 3) + 0) << kOpcodeShift, |
323 SH = ((5 << 3) + 1) << kOpcodeShift, | 329 SH = ((5 << 3) + 1) << kOpcodeShift, |
324 SWL = ((5 << 3) + 2) << kOpcodeShift, | 330 SWL = ((5 << 3) + 2) << kOpcodeShift, |
325 SW = ((5 << 3) + 3) << kOpcodeShift, | 331 SW = ((5 << 3) + 3) << kOpcodeShift, |
326 SDL = ((5 << 3) + 4) << kOpcodeShift, | 332 SDL = ((5 << 3) + 4) << kOpcodeShift, |
327 SDR = ((5 << 3) + 5) << kOpcodeShift, | 333 SDR = ((5 << 3) + 5) << kOpcodeShift, |
328 SWR = ((5 << 3) + 6) << kOpcodeShift, | 334 SWR = ((5 << 3) + 6) << kOpcodeShift, |
329 | 335 |
330 LWC1 = ((6 << 3) + 1) << kOpcodeShift, | 336 LWC1 = ((6 << 3) + 1) << kOpcodeShift, |
331 LLD = ((6 << 3) + 4) << kOpcodeShift, | 337 LLD = ((6 << 3) + 4) << kOpcodeShift, |
332 LDC1 = ((6 << 3) + 5) << kOpcodeShift, | 338 LDC1 = ((6 << 3) + 5) << kOpcodeShift, |
339 BEQZC = ((6 << 3) + 6) << kOpcodeShift, | |
333 LD = ((6 << 3) + 7) << kOpcodeShift, | 340 LD = ((6 << 3) + 7) << kOpcodeShift, |
334 | 341 |
335 PREF = ((6 << 3) + 3) << kOpcodeShift, | 342 PREF = ((6 << 3) + 3) << kOpcodeShift, |
336 | 343 |
337 SWC1 = ((7 << 3) + 1) << kOpcodeShift, | 344 SWC1 = ((7 << 3) + 1) << kOpcodeShift, |
338 SCD = ((7 << 3) + 4) << kOpcodeShift, | 345 SCD = ((7 << 3) + 4) << kOpcodeShift, |
339 SDC1 = ((7 << 3) + 5) << kOpcodeShift, | 346 SDC1 = ((7 << 3) + 5) << kOpcodeShift, |
347 BNEZC = ((7 << 3) + 6) << kOpcodeShift, | |
340 SD = ((7 << 3) + 7) << kOpcodeShift, | 348 SD = ((7 << 3) + 7) << kOpcodeShift, |
341 | 349 |
342 COP1X = ((1 << 4) + 3) << kOpcodeShift | 350 COP1X = ((1 << 4) + 3) << kOpcodeShift |
343 }; | 351 }; |
344 | 352 |
345 enum SecondaryField { | 353 enum SecondaryField { |
346 // SPECIAL Encoding of Function Field. | 354 // SPECIAL Encoding of Function Field. |
347 SLL = ((0 << 3) + 0), | 355 SLL = ((0 << 3) + 0), |
348 MOVCI = ((0 << 3) + 1), | 356 MOVCI = ((0 << 3) + 1), |
349 SRL = ((0 << 3) + 2), | 357 SRL = ((0 << 3) + 2), |
350 SRA = ((0 << 3) + 3), | 358 SRA = ((0 << 3) + 3), |
351 SLLV = ((0 << 3) + 4), | 359 SLLV = ((0 << 3) + 4), |
352 SRLV = ((0 << 3) + 6), | 360 SRLV = ((0 << 3) + 6), |
353 SRAV = ((0 << 3) + 7), | 361 SRAV = ((0 << 3) + 7), |
354 | 362 |
355 JR = ((1 << 3) + 0), | 363 JR = ((1 << 3) + 0), |
356 JALR = ((1 << 3) + 1), | 364 JALR = ((1 << 3) + 1), |
357 MOVZ = ((1 << 3) + 2), | 365 MOVZ = ((1 << 3) + 2), |
358 MOVN = ((1 << 3) + 3), | 366 MOVN = ((1 << 3) + 3), |
359 BREAK = ((1 << 3) + 5), | 367 BREAK = ((1 << 3) + 5), |
360 | 368 |
361 MFHI = ((2 << 3) + 0), | 369 MFHI = ((2 << 3) + 0), |
370 CLZ_R6 = ((2 << 3) + 0), | |
371 CLO_R6 = ((2 << 3) + 1), | |
362 MFLO = ((2 << 3) + 2), | 372 MFLO = ((2 << 3) + 2), |
363 DSLLV = ((2 << 3) + 4), | 373 DSLLV = ((2 << 3) + 4), |
364 DSRLV = ((2 << 3) + 6), | 374 DSRLV = ((2 << 3) + 6), |
365 DSRAV = ((2 << 3) + 7), | 375 DSRAV = ((2 << 3) + 7), |
366 | 376 |
367 MULT = ((3 << 3) + 0), | 377 MULT = ((3 << 3) + 0), |
368 MULTU = ((3 << 3) + 1), | 378 MULTU = ((3 << 3) + 1), |
369 DIV = ((3 << 3) + 2), | 379 DIV = ((3 << 3) + 2), |
370 DIVU = ((3 << 3) + 3), | 380 DIVU = ((3 << 3) + 3), |
371 DMULT = ((3 << 3) + 4), | 381 DMULT = ((3 << 3) + 4), |
(...skipping 15 matching lines...) Expand all Loading... | |
387 DADD = ((5 << 3) + 4), | 397 DADD = ((5 << 3) + 4), |
388 DADDU = ((5 << 3) + 5), | 398 DADDU = ((5 << 3) + 5), |
389 DSUB = ((5 << 3) + 6), | 399 DSUB = ((5 << 3) + 6), |
390 DSUBU = ((5 << 3) + 7), | 400 DSUBU = ((5 << 3) + 7), |
391 | 401 |
392 TGE = ((6 << 3) + 0), | 402 TGE = ((6 << 3) + 0), |
393 TGEU = ((6 << 3) + 1), | 403 TGEU = ((6 << 3) + 1), |
394 TLT = ((6 << 3) + 2), | 404 TLT = ((6 << 3) + 2), |
395 TLTU = ((6 << 3) + 3), | 405 TLTU = ((6 << 3) + 3), |
396 TEQ = ((6 << 3) + 4), | 406 TEQ = ((6 << 3) + 4), |
407 SELEQZ_S = ((6 << 3) + 5), | |
397 TNE = ((6 << 3) + 6), | 408 TNE = ((6 << 3) + 6), |
409 SELNEZ_S = ((6 << 3) + 7), | |
398 | 410 |
399 DSLL = ((7 << 3) + 0), | 411 DSLL = ((7 << 3) + 0), |
400 DSRL = ((7 << 3) + 2), | 412 DSRL = ((7 << 3) + 2), |
401 DSRA = ((7 << 3) + 3), | 413 DSRA = ((7 << 3) + 3), |
402 DSLL32 = ((7 << 3) + 4), | 414 DSLL32 = ((7 << 3) + 4), |
403 DSRL32 = ((7 << 3) + 6), | 415 DSRL32 = ((7 << 3) + 6), |
404 DSRA32 = ((7 << 3) + 7), | 416 DSRA32 = ((7 << 3) + 7), |
417 | |
418 // Multiply integers in r6. | |
419 MUL_MUH = ((3 << 3) + 0), // MUL, MUH. | |
paul.l...
2014/07/29 14:58:04
nit: one space after MUL,
dusmil.imgtec
2014/07/29 17:39:12
Done.
| |
420 MUL_MUH_U = ((3 << 3) + 1), // MUL_U, MUH_U. | |
421 D_MUL_MUH = ((7 << 2) + 0), // DMUL, DMUH. | |
422 D_MUL_MUH_U = ((7 << 2) + 1), // DMUL_U, DMUH_U. | |
423 | |
424 MUL_OP = ((0 << 3) + 2), | |
425 MUH_OP = ((0 << 3) + 3), | |
426 DIV_OP = ((0 << 3) + 2), | |
427 MOD_OP = ((0 << 3) + 3), | |
428 | |
429 DIV_MOD = ((3 << 3) + 2), | |
430 DIV_MOD_U = ((3 << 3) + 3), | |
431 D_DIV_MOD = ((3 << 3) + 6), | |
432 D_DIV_MOD_U = ((3 << 3) + 7), | |
433 | |
405 // drotr in special4? | 434 // drotr in special4? |
406 | 435 |
407 // SPECIAL2 Encoding of Function Field. | 436 // SPECIAL2 Encoding of Function Field. |
408 MUL = ((0 << 3) + 2), | 437 MUL = ((0 << 3) + 2), |
409 CLZ = ((4 << 3) + 0), | 438 CLZ = ((4 << 3) + 0), |
410 CLO = ((4 << 3) + 1), | 439 CLO = ((4 << 3) + 1), |
411 | 440 |
412 // SPECIAL3 Encoding of Function Field. | 441 // SPECIAL3 Encoding of Function Field. |
413 EXT = ((0 << 3) + 0), | 442 EXT = ((0 << 3) + 0), |
414 DEXTM = ((0 << 3) + 1), | 443 DEXTM = ((0 << 3) + 1), |
415 DEXTU = ((0 << 3) + 2), | 444 DEXTU = ((0 << 3) + 2), |
416 DEXT = ((0 << 3) + 3), | 445 DEXT = ((0 << 3) + 3), |
417 INS = ((0 << 3) + 4), | 446 INS = ((0 << 3) + 4), |
418 DINSM = ((0 << 3) + 5), | 447 DINSM = ((0 << 3) + 5), |
419 DINSU = ((0 << 3) + 6), | 448 DINSU = ((0 << 3) + 6), |
420 DINS = ((0 << 3) + 7), | 449 DINS = ((0 << 3) + 7), |
421 | 450 |
422 DSBH = ((4 << 3) + 4), | 451 DSBH = ((4 << 3) + 4), |
423 | 452 |
424 // REGIMM encoding of rt Field. | 453 // REGIMM encoding of rt Field. |
425 BLTZ = ((0 << 3) + 0) << 16, | 454 BLTZ = ((0 << 3) + 0) << 16, |
426 BGEZ = ((0 << 3) + 1) << 16, | 455 BGEZ = ((0 << 3) + 1) << 16, |
427 BLTZAL = ((2 << 3) + 0) << 16, | 456 BLTZAL = ((2 << 3) + 0) << 16, |
428 BGEZAL = ((2 << 3) + 1) << 16, | 457 BGEZAL = ((2 << 3) + 1) << 16, |
458 BGEZALL = ((2 << 3) + 3) << 16, | |
459 DAHI = ((0 << 3) + 6) << 16, | |
460 DATI = ((3 << 3) + 6) << 16, | |
429 | 461 |
430 // COP1 Encoding of rs Field. | 462 // COP1 Encoding of rs Field. |
431 MFC1 = ((0 << 3) + 0) << 21, | 463 MFC1 = ((0 << 3) + 0) << 21, |
432 DMFC1 = ((0 << 3) + 1) << 21, | 464 DMFC1 = ((0 << 3) + 1) << 21, |
433 CFC1 = ((0 << 3) + 2) << 21, | 465 CFC1 = ((0 << 3) + 2) << 21, |
434 MFHC1 = ((0 << 3) + 3) << 21, | 466 MFHC1 = ((0 << 3) + 3) << 21, |
435 MTC1 = ((0 << 3) + 4) << 21, | 467 MTC1 = ((0 << 3) + 4) << 21, |
436 DMTC1 = ((0 << 3) + 5) << 21, | 468 DMTC1 = ((0 << 3) + 5) << 21, |
437 CTC1 = ((0 << 3) + 6) << 21, | 469 CTC1 = ((0 << 3) + 6) << 21, |
438 MTHC1 = ((0 << 3) + 7) << 21, | 470 MTHC1 = ((0 << 3) + 7) << 21, |
(...skipping 26 matching lines...) Expand all Loading... | |
465 MOV_D = ((0 << 3) + 6), | 497 MOV_D = ((0 << 3) + 6), |
466 NEG_D = ((0 << 3) + 7), | 498 NEG_D = ((0 << 3) + 7), |
467 ROUND_L_D = ((1 << 3) + 0), | 499 ROUND_L_D = ((1 << 3) + 0), |
468 TRUNC_L_D = ((1 << 3) + 1), | 500 TRUNC_L_D = ((1 << 3) + 1), |
469 CEIL_L_D = ((1 << 3) + 2), | 501 CEIL_L_D = ((1 << 3) + 2), |
470 FLOOR_L_D = ((1 << 3) + 3), | 502 FLOOR_L_D = ((1 << 3) + 3), |
471 ROUND_W_D = ((1 << 3) + 4), | 503 ROUND_W_D = ((1 << 3) + 4), |
472 TRUNC_W_D = ((1 << 3) + 5), | 504 TRUNC_W_D = ((1 << 3) + 5), |
473 CEIL_W_D = ((1 << 3) + 6), | 505 CEIL_W_D = ((1 << 3) + 6), |
474 FLOOR_W_D = ((1 << 3) + 7), | 506 FLOOR_W_D = ((1 << 3) + 7), |
507 MIN = ((3 << 3) + 4), | |
508 MINA = ((3 << 3) + 5), | |
509 MAX = ((3 << 3) + 6), | |
510 MAXA = ((3 << 3) + 7), | |
475 CVT_S_D = ((4 << 3) + 0), | 511 CVT_S_D = ((4 << 3) + 0), |
476 CVT_W_D = ((4 << 3) + 4), | 512 CVT_W_D = ((4 << 3) + 4), |
477 CVT_L_D = ((4 << 3) + 5), | 513 CVT_L_D = ((4 << 3) + 5), |
478 C_F_D = ((6 << 3) + 0), | 514 C_F_D = ((6 << 3) + 0), |
479 C_UN_D = ((6 << 3) + 1), | 515 C_UN_D = ((6 << 3) + 1), |
480 C_EQ_D = ((6 << 3) + 2), | 516 C_EQ_D = ((6 << 3) + 2), |
481 C_UEQ_D = ((6 << 3) + 3), | 517 C_UEQ_D = ((6 << 3) + 3), |
482 C_OLT_D = ((6 << 3) + 4), | 518 C_OLT_D = ((6 << 3) + 4), |
483 C_ULT_D = ((6 << 3) + 5), | 519 C_ULT_D = ((6 << 3) + 5), |
484 C_OLE_D = ((6 << 3) + 6), | 520 C_OLE_D = ((6 << 3) + 6), |
485 C_ULE_D = ((6 << 3) + 7), | 521 C_ULE_D = ((6 << 3) + 7), |
486 // COP1 Encoding of Function Field When rs=W or L. | 522 // COP1 Encoding of Function Field When rs=W or L. |
487 CVT_S_W = ((4 << 3) + 0), | 523 CVT_S_W = ((4 << 3) + 0), |
488 CVT_D_W = ((4 << 3) + 1), | 524 CVT_D_W = ((4 << 3) + 1), |
489 CVT_S_L = ((4 << 3) + 0), | 525 CVT_S_L = ((4 << 3) + 0), |
490 CVT_D_L = ((4 << 3) + 1), | 526 CVT_D_L = ((4 << 3) + 1), |
527 BC1EQZ = ((2 << 2) + 1) << 21, | |
528 BC1NEZ = ((3 << 2) + 1) << 21, | |
529 // COP1 CMP positive predicates Bit 5..4 = 00. | |
530 CMP_AF = ((0 << 3) + 0), | |
531 CMP_UN = ((0 << 3) + 1), | |
532 CMP_EQ = ((0 << 3) + 2), | |
533 CMP_UEQ = ((0 << 3) + 3), | |
534 CMP_LT = ((0 << 3) + 4), | |
535 CMP_ULT = ((0 << 3) + 5), | |
536 CMP_LE = ((0 << 3) + 6), | |
537 CMP_ULE = ((0 << 3) + 7), | |
538 CMP_SAF = ((1 << 3) + 0), | |
539 CMP_SUN = ((1 << 3) + 1), | |
540 CMP_SEQ = ((1 << 3) + 2), | |
541 CMP_SUEQ = ((1 << 3) + 3), | |
542 CMP_SSLT = ((1 << 3) + 4), | |
543 CMP_SSULT = ((1 << 3) + 5), | |
544 CMP_SLE = ((1 << 3) + 6), | |
545 CMP_SULE = ((1 << 3) + 7), | |
546 // COP1 CMP negative predicates Bit 5..4 = 01. | |
547 CMP_AT = ((2 << 3) + 0), // Reserved, not implemented. | |
548 CMP_OR = ((2 << 3) + 1), | |
549 CMP_UNE = ((2 << 3) + 2), | |
550 CMP_NE = ((2 << 3) + 3), | |
551 CMP_UGE = ((2 << 3) + 4), // Reserved, not implemented. | |
552 CMP_OGE = ((2 << 3) + 5), // Reserved, not implemented. | |
553 CMP_UGT = ((2 << 3) + 6), // Reserved, not implemented. | |
554 CMP_OGT = ((2 << 3) + 7), // Reserved, not implemented. | |
555 CMP_SAT = ((3 << 3) + 0), // Reserved, not implemented. | |
556 CMP_SOR = ((3 << 3) + 1), | |
557 CMP_SUNE = ((3 << 3) + 2), | |
558 CMP_SNE = ((3 << 3) + 3), | |
559 CMP_SUGE = ((3 << 3) + 4), // Reserved, not implemented. | |
560 CMP_SOGE = ((3 << 3) + 5), // Reserved, not implemented. | |
561 CMP_SUGT = ((3 << 3) + 6), // Reserved, not implemented. | |
562 CMP_SOGT = ((3 << 3) + 7), // Reserved, not implemented. | |
563 | |
564 SEL = ((2 << 3) + 0), | |
565 SELEQZ_C = ((2 << 3) + 4), // COP1 on FPR registers. | |
566 SELNEZ_C = ((2 << 3) + 7), // COP1 on FPR registers. | |
567 | |
491 // COP1 Encoding of Function Field When rs=PS. | 568 // COP1 Encoding of Function Field When rs=PS. |
492 // COP1X Encoding of Function Field. | 569 // COP1X Encoding of Function Field. |
493 MADD_D = ((4 << 3) + 1), | 570 MADD_D = ((4 << 3) + 1), |
494 | 571 |
495 NULLSF = 0 | 572 NULLSF = 0 |
496 }; | 573 }; |
497 | 574 |
498 | 575 |
499 // ----- Emulated conditions. | 576 // ----- Emulated conditions. |
500 // On MIPS we use this enum to abstract from conditionnal branch instructions. | 577 // On MIPS we use this enum to abstract from conditional branch instructions. |
501 // The 'U' prefix is used to specify unsigned comparisons. | 578 // The 'U' prefix is used to specify unsigned comparisons. |
502 // Oppposite conditions must be paired as odd/even numbers | 579 // Opposite conditions must be paired as odd/even numbers |
503 // because 'NegateCondition' function flips LSB to negate condition. | 580 // because 'NegateCondition' function flips LSB to negate condition. |
504 enum Condition { | 581 enum Condition { |
505 // Any value < 0 is considered no_condition. | 582 // Any value < 0 is considered no_condition. |
506 kNoCondition = -1, | 583 kNoCondition = -1, |
507 | 584 |
508 overflow = 0, | 585 overflow = 0, |
509 no_overflow = 1, | 586 no_overflow = 1, |
510 Uless = 2, | 587 Uless = 2, |
511 Ugreater_equal= 3, | 588 Ugreater_equal= 3, |
512 equal = 4, | 589 equal = 4, |
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826 default: | 903 default: |
827 return NULLSF; | 904 return NULLSF; |
828 } | 905 } |
829 } | 906 } |
830 | 907 |
831 inline int32_t Imm16Value() const { | 908 inline int32_t Imm16Value() const { |
832 ASSERT(InstructionType() == kImmediateType); | 909 ASSERT(InstructionType() == kImmediateType); |
833 return Bits(kImm16Shift + kImm16Bits - 1, kImm16Shift); | 910 return Bits(kImm16Shift + kImm16Bits - 1, kImm16Shift); |
834 } | 911 } |
835 | 912 |
913 inline int32_t Imm21Value() const { | |
914 ASSERT(InstructionType() == kImmediateType); | |
915 return Bits(kImm21Shift + kImm21Bits - 1, kImm21Shift); | |
916 } | |
917 | |
836 inline int32_t Imm26Value() const { | 918 inline int32_t Imm26Value() const { |
837 ASSERT(InstructionType() == kJumpType); | 919 ASSERT(InstructionType() == kJumpType); |
838 return Bits(kImm26Shift + kImm26Bits - 1, kImm26Shift); | 920 return Bits(kImm26Shift + kImm26Bits - 1, kImm26Shift); |
839 } | 921 } |
840 | 922 |
841 // Say if the instruction should not be used in a branch delay slot. | 923 // Say if the instruction should not be used in a branch delay slot. |
842 bool IsForbiddenInBranchDelay() const; | 924 bool IsForbiddenInBranchDelay() const; |
843 // Say if the instruction 'links'. e.g. jal, bal. | 925 // Say if the instruction 'links'. e.g. jal, bal. |
844 bool IsLinkingInstruction() const; | 926 bool IsLinkingInstruction() const; |
845 // Say if the instruction is a break or a trap. | 927 // Say if the instruction is a break or a trap. |
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867 | 949 |
868 // TODO(plind): below should be based on kPointerSize | 950 // TODO(plind): below should be based on kPointerSize |
869 // TODO(plind): find all usages and remove the needless instructions for n64. | 951 // TODO(plind): find all usages and remove the needless instructions for n64. |
870 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2; | 952 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2; |
871 | 953 |
872 const int kBranchReturnOffset = 2 * Instruction::kInstrSize; | 954 const int kBranchReturnOffset = 2 * Instruction::kInstrSize; |
873 | 955 |
874 } } // namespace v8::internal | 956 } } // namespace v8::internal |
875 | 957 |
876 #endif // #ifndef V8_MIPS_CONSTANTS_H_ | 958 #endif // #ifndef V8_MIPS_CONSTANTS_H_ |
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