OLD | NEW |
1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_MIPS_CONSTANTS_H_ | 5 #ifndef V8_MIPS_CONSTANTS_H_ |
6 #define V8_MIPS_CONSTANTS_H_ | 6 #define V8_MIPS_CONSTANTS_H_ |
7 | 7 |
8 // UNIMPLEMENTED_ macro for MIPS. | 8 // UNIMPLEMENTED_ macro for MIPS. |
9 #ifdef DEBUG | 9 #ifdef DEBUG |
10 #define UNIMPLEMENTED_MIPS() \ | 10 #define UNIMPLEMENTED_MIPS() \ |
11 v8::internal::PrintF("%s, \tline %d: \tfunction %s not implemented. \n", \ | 11 v8::internal::PrintF("%s, \tline %d: \tfunction %s not implemented. \n", \ |
12 __FILE__, __LINE__, __func__) | 12 __FILE__, __LINE__, __func__) |
13 #else | 13 #else |
14 #define UNIMPLEMENTED_MIPS() | 14 #define UNIMPLEMENTED_MIPS() |
15 #endif | 15 #endif |
16 | 16 |
17 #define UNSUPPORTED_MIPS() v8::internal::PrintF("Unsupported instruction.\n") | 17 #define UNSUPPORTED_MIPS() v8::internal::PrintF("Unsupported instruction.\n") |
18 | 18 |
19 enum ArchVariants { | 19 enum ArchVariants { |
20 kMips32r2, | 20 kMips64r2, |
21 kMips32r1, | 21 kMips64r6 |
22 kLoongson, | |
23 kMips64r2 | |
24 }; | 22 }; |
25 | 23 |
26 | 24 |
27 #ifdef _MIPS_ARCH_MIPS64R2 | 25 #ifdef _MIPS_ARCH_MIPS64R2 |
28 static const ArchVariants kArchVariant = kMips64r2; | 26 static const ArchVariants kArchVariant = kMips64r2; |
29 #elif _MIPS_ARCH_LOONGSON | 27 #elif _MIPS_ARCH_MIPS64R6 |
30 // The loongson flag refers to the LOONGSON architectures based on MIPS-III, | 28 static const ArchVariants kArchVariant = kMips64r6; |
31 // which predates (and is a subset of) the mips32r2 and r1 architectures. | |
32 static const ArchVariants kArchVariant = kLoongson; | |
33 #else | 29 #else |
34 static const ArchVariants kArchVariant = kMips64r1; | 30 static const ArchVariants kArchVariant = kMips64r2; |
35 #endif | 31 #endif |
36 | 32 |
37 | 33 |
38 // TODO(plind): consider deriving ABI from compiler flags or build system. | 34 // TODO(plind): consider deriving ABI from compiler flags or build system. |
39 | 35 |
40 // ABI-dependent definitions are made with #define in simulator-mips64.h, | 36 // ABI-dependent definitions are made with #define in simulator-mips64.h, |
41 // so the ABI choice must be available to the pre-processor. However, in all | 37 // so the ABI choice must be available to the pre-processor. However, in all |
42 // other cases, we should use the enum AbiVariants with normal if statements. | 38 // other cases, we should use the enum AbiVariants with normal if statements. |
43 | 39 |
44 #define MIPS_ABI_N64 1 | 40 #define MIPS_ABI_N64 1 |
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221 const int kRdShift = 11; | 217 const int kRdShift = 11; |
222 const int kRdBits = 5; | 218 const int kRdBits = 5; |
223 const int kSaShift = 6; | 219 const int kSaShift = 6; |
224 const int kSaBits = 5; | 220 const int kSaBits = 5; |
225 const int kFunctionShift = 0; | 221 const int kFunctionShift = 0; |
226 const int kFunctionBits = 6; | 222 const int kFunctionBits = 6; |
227 const int kLuiShift = 16; | 223 const int kLuiShift = 16; |
228 | 224 |
229 const int kImm16Shift = 0; | 225 const int kImm16Shift = 0; |
230 const int kImm16Bits = 16; | 226 const int kImm16Bits = 16; |
| 227 const int kImm21Shift = 0; |
| 228 const int kImm21Bits = 21; |
231 const int kImm26Shift = 0; | 229 const int kImm26Shift = 0; |
232 const int kImm26Bits = 26; | 230 const int kImm26Bits = 26; |
233 const int kImm28Shift = 0; | 231 const int kImm28Shift = 0; |
234 const int kImm28Bits = 28; | 232 const int kImm28Bits = 28; |
235 const int kImm32Shift = 0; | 233 const int kImm32Shift = 0; |
236 const int kImm32Bits = 32; | 234 const int kImm32Bits = 32; |
237 | 235 |
238 // In branches and jumps immediate fields point to words, not bytes, | 236 // In branches and jumps immediate fields point to words, not bytes, |
239 // and are therefore shifted by 2. | 237 // and are therefore shifted by 2. |
240 const int kImmFieldShift = 2; | 238 const int kImmFieldShift = 2; |
(...skipping 47 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
288 BLEZ = ((0 << 3) + 6) << kOpcodeShift, | 286 BLEZ = ((0 << 3) + 6) << kOpcodeShift, |
289 BGTZ = ((0 << 3) + 7) << kOpcodeShift, | 287 BGTZ = ((0 << 3) + 7) << kOpcodeShift, |
290 | 288 |
291 ADDI = ((1 << 3) + 0) << kOpcodeShift, | 289 ADDI = ((1 << 3) + 0) << kOpcodeShift, |
292 ADDIU = ((1 << 3) + 1) << kOpcodeShift, | 290 ADDIU = ((1 << 3) + 1) << kOpcodeShift, |
293 SLTI = ((1 << 3) + 2) << kOpcodeShift, | 291 SLTI = ((1 << 3) + 2) << kOpcodeShift, |
294 SLTIU = ((1 << 3) + 3) << kOpcodeShift, | 292 SLTIU = ((1 << 3) + 3) << kOpcodeShift, |
295 ANDI = ((1 << 3) + 4) << kOpcodeShift, | 293 ANDI = ((1 << 3) + 4) << kOpcodeShift, |
296 ORI = ((1 << 3) + 5) << kOpcodeShift, | 294 ORI = ((1 << 3) + 5) << kOpcodeShift, |
297 XORI = ((1 << 3) + 6) << kOpcodeShift, | 295 XORI = ((1 << 3) + 6) << kOpcodeShift, |
298 LUI = ((1 << 3) + 7) << kOpcodeShift, | 296 LUI = ((1 << 3) + 7) << kOpcodeShift, // LUI/AUI family. |
| 297 DAUI = ((3 << 3) + 5) << kOpcodeShift, |
299 | 298 |
| 299 BEQC = ((2 << 3) + 0) << kOpcodeShift, |
300 COP1 = ((2 << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. | 300 COP1 = ((2 << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. |
301 BEQL = ((2 << 3) + 4) << kOpcodeShift, | 301 BEQL = ((2 << 3) + 4) << kOpcodeShift, |
302 BNEL = ((2 << 3) + 5) << kOpcodeShift, | 302 BNEL = ((2 << 3) + 5) << kOpcodeShift, |
303 BLEZL = ((2 << 3) + 6) << kOpcodeShift, | 303 BLEZL = ((2 << 3) + 6) << kOpcodeShift, |
304 BGTZL = ((2 << 3) + 7) << kOpcodeShift, | 304 BGTZL = ((2 << 3) + 7) << kOpcodeShift, |
305 | 305 |
306 DADDI = ((3 << 3) + 0) << kOpcodeShift, | 306 DADDI = ((3 << 3) + 0) << kOpcodeShift, // This is also BNEC. |
307 DADDIU = ((3 << 3) + 1) << kOpcodeShift, | 307 DADDIU = ((3 << 3) + 1) << kOpcodeShift, |
308 LDL = ((3 << 3) + 2) << kOpcodeShift, | 308 LDL = ((3 << 3) + 2) << kOpcodeShift, |
309 LDR = ((3 << 3) + 3) << kOpcodeShift, | 309 LDR = ((3 << 3) + 3) << kOpcodeShift, |
310 SPECIAL2 = ((3 << 3) + 4) << kOpcodeShift, | 310 SPECIAL2 = ((3 << 3) + 4) << kOpcodeShift, |
311 SPECIAL3 = ((3 << 3) + 7) << kOpcodeShift, | 311 SPECIAL3 = ((3 << 3) + 7) << kOpcodeShift, |
312 | 312 |
313 LB = ((4 << 3) + 0) << kOpcodeShift, | 313 LB = ((4 << 3) + 0) << kOpcodeShift, |
314 LH = ((4 << 3) + 1) << kOpcodeShift, | 314 LH = ((4 << 3) + 1) << kOpcodeShift, |
315 LWL = ((4 << 3) + 2) << kOpcodeShift, | 315 LWL = ((4 << 3) + 2) << kOpcodeShift, |
316 LW = ((4 << 3) + 3) << kOpcodeShift, | 316 LW = ((4 << 3) + 3) << kOpcodeShift, |
317 LBU = ((4 << 3) + 4) << kOpcodeShift, | 317 LBU = ((4 << 3) + 4) << kOpcodeShift, |
318 LHU = ((4 << 3) + 5) << kOpcodeShift, | 318 LHU = ((4 << 3) + 5) << kOpcodeShift, |
319 LWR = ((4 << 3) + 6) << kOpcodeShift, | 319 LWR = ((4 << 3) + 6) << kOpcodeShift, |
320 LWU = ((4 << 3) + 7) << kOpcodeShift, | 320 LWU = ((4 << 3) + 7) << kOpcodeShift, |
321 | 321 |
322 SB = ((5 << 3) + 0) << kOpcodeShift, | 322 SB = ((5 << 3) + 0) << kOpcodeShift, |
323 SH = ((5 << 3) + 1) << kOpcodeShift, | 323 SH = ((5 << 3) + 1) << kOpcodeShift, |
324 SWL = ((5 << 3) + 2) << kOpcodeShift, | 324 SWL = ((5 << 3) + 2) << kOpcodeShift, |
325 SW = ((5 << 3) + 3) << kOpcodeShift, | 325 SW = ((5 << 3) + 3) << kOpcodeShift, |
326 SDL = ((5 << 3) + 4) << kOpcodeShift, | 326 SDL = ((5 << 3) + 4) << kOpcodeShift, |
327 SDR = ((5 << 3) + 5) << kOpcodeShift, | 327 SDR = ((5 << 3) + 5) << kOpcodeShift, |
328 SWR = ((5 << 3) + 6) << kOpcodeShift, | 328 SWR = ((5 << 3) + 6) << kOpcodeShift, |
329 | 329 |
330 LWC1 = ((6 << 3) + 1) << kOpcodeShift, | 330 LWC1 = ((6 << 3) + 1) << kOpcodeShift, |
331 LLD = ((6 << 3) + 4) << kOpcodeShift, | 331 LLD = ((6 << 3) + 4) << kOpcodeShift, |
332 LDC1 = ((6 << 3) + 5) << kOpcodeShift, | 332 LDC1 = ((6 << 3) + 5) << kOpcodeShift, |
| 333 BEQZC = ((6 << 3) + 6) << kOpcodeShift, |
333 LD = ((6 << 3) + 7) << kOpcodeShift, | 334 LD = ((6 << 3) + 7) << kOpcodeShift, |
334 | 335 |
335 PREF = ((6 << 3) + 3) << kOpcodeShift, | 336 PREF = ((6 << 3) + 3) << kOpcodeShift, |
336 | 337 |
337 SWC1 = ((7 << 3) + 1) << kOpcodeShift, | 338 SWC1 = ((7 << 3) + 1) << kOpcodeShift, |
338 SCD = ((7 << 3) + 4) << kOpcodeShift, | 339 SCD = ((7 << 3) + 4) << kOpcodeShift, |
339 SDC1 = ((7 << 3) + 5) << kOpcodeShift, | 340 SDC1 = ((7 << 3) + 5) << kOpcodeShift, |
| 341 BNEZC = ((7 << 3) + 6) << kOpcodeShift, |
340 SD = ((7 << 3) + 7) << kOpcodeShift, | 342 SD = ((7 << 3) + 7) << kOpcodeShift, |
341 | 343 |
342 COP1X = ((1 << 4) + 3) << kOpcodeShift | 344 COP1X = ((1 << 4) + 3) << kOpcodeShift |
343 }; | 345 }; |
344 | 346 |
345 enum SecondaryField { | 347 enum SecondaryField { |
346 // SPECIAL Encoding of Function Field. | 348 // SPECIAL Encoding of Function Field. |
347 SLL = ((0 << 3) + 0), | 349 SLL = ((0 << 3) + 0), |
348 MOVCI = ((0 << 3) + 1), | 350 MOVCI = ((0 << 3) + 1), |
349 SRL = ((0 << 3) + 2), | 351 SRL = ((0 << 3) + 2), |
350 SRA = ((0 << 3) + 3), | 352 SRA = ((0 << 3) + 3), |
351 SLLV = ((0 << 3) + 4), | 353 SLLV = ((0 << 3) + 4), |
352 SRLV = ((0 << 3) + 6), | 354 SRLV = ((0 << 3) + 6), |
353 SRAV = ((0 << 3) + 7), | 355 SRAV = ((0 << 3) + 7), |
354 | 356 |
355 JR = ((1 << 3) + 0), | 357 JR = ((1 << 3) + 0), |
356 JALR = ((1 << 3) + 1), | 358 JALR = ((1 << 3) + 1), |
357 MOVZ = ((1 << 3) + 2), | 359 MOVZ = ((1 << 3) + 2), |
358 MOVN = ((1 << 3) + 3), | 360 MOVN = ((1 << 3) + 3), |
359 BREAK = ((1 << 3) + 5), | 361 BREAK = ((1 << 3) + 5), |
360 | 362 |
361 MFHI = ((2 << 3) + 0), | 363 MFHI = ((2 << 3) + 0), |
| 364 CLZ_R6 = ((2 << 3) + 0), |
| 365 CLO_R6 = ((2 << 3) + 1), |
362 MFLO = ((2 << 3) + 2), | 366 MFLO = ((2 << 3) + 2), |
363 DSLLV = ((2 << 3) + 4), | 367 DSLLV = ((2 << 3) + 4), |
364 DSRLV = ((2 << 3) + 6), | 368 DSRLV = ((2 << 3) + 6), |
365 DSRAV = ((2 << 3) + 7), | 369 DSRAV = ((2 << 3) + 7), |
366 | 370 |
367 MULT = ((3 << 3) + 0), | 371 MULT = ((3 << 3) + 0), |
368 MULTU = ((3 << 3) + 1), | 372 MULTU = ((3 << 3) + 1), |
369 DIV = ((3 << 3) + 2), | 373 DIV = ((3 << 3) + 2), |
370 DIVU = ((3 << 3) + 3), | 374 DIVU = ((3 << 3) + 3), |
371 DMULT = ((3 << 3) + 4), | 375 DMULT = ((3 << 3) + 4), |
(...skipping 15 matching lines...) Expand all Loading... |
387 DADD = ((5 << 3) + 4), | 391 DADD = ((5 << 3) + 4), |
388 DADDU = ((5 << 3) + 5), | 392 DADDU = ((5 << 3) + 5), |
389 DSUB = ((5 << 3) + 6), | 393 DSUB = ((5 << 3) + 6), |
390 DSUBU = ((5 << 3) + 7), | 394 DSUBU = ((5 << 3) + 7), |
391 | 395 |
392 TGE = ((6 << 3) + 0), | 396 TGE = ((6 << 3) + 0), |
393 TGEU = ((6 << 3) + 1), | 397 TGEU = ((6 << 3) + 1), |
394 TLT = ((6 << 3) + 2), | 398 TLT = ((6 << 3) + 2), |
395 TLTU = ((6 << 3) + 3), | 399 TLTU = ((6 << 3) + 3), |
396 TEQ = ((6 << 3) + 4), | 400 TEQ = ((6 << 3) + 4), |
| 401 SELEQZ_S = ((6 << 3) + 5), |
397 TNE = ((6 << 3) + 6), | 402 TNE = ((6 << 3) + 6), |
| 403 SELNEZ_S = ((6 << 3) + 7), |
398 | 404 |
399 DSLL = ((7 << 3) + 0), | 405 DSLL = ((7 << 3) + 0), |
400 DSRL = ((7 << 3) + 2), | 406 DSRL = ((7 << 3) + 2), |
401 DSRA = ((7 << 3) + 3), | 407 DSRA = ((7 << 3) + 3), |
402 DSLL32 = ((7 << 3) + 4), | 408 DSLL32 = ((7 << 3) + 4), |
403 DSRL32 = ((7 << 3) + 6), | 409 DSRL32 = ((7 << 3) + 6), |
404 DSRA32 = ((7 << 3) + 7), | 410 DSRA32 = ((7 << 3) + 7), |
| 411 |
| 412 // Multiply integers in r6. |
| 413 MUL_MUH = ((3 << 3) + 0), // MUL, MUH. |
| 414 MUL_MUH_U = ((3 << 3) + 1), // MUL_U, MUH_U. |
| 415 D_MUL_MUH = ((7 << 2) + 0), // DMUL, DMUH. |
| 416 D_MUL_MUH_U = ((7 << 2) + 1), // DMUL_U, DMUH_U. |
| 417 |
| 418 MUL_OP = ((0 << 3) + 2), |
| 419 MUH_OP = ((0 << 3) + 3), |
| 420 DIV_OP = ((0 << 3) + 2), |
| 421 MOD_OP = ((0 << 3) + 3), |
| 422 |
| 423 DIV_MOD = ((3 << 3) + 2), |
| 424 DIV_MOD_U = ((3 << 3) + 3), |
| 425 D_DIV_MOD = ((3 << 3) + 6), |
| 426 D_DIV_MOD_U = ((3 << 3) + 7), |
| 427 |
405 // drotr in special4? | 428 // drotr in special4? |
406 | 429 |
407 // SPECIAL2 Encoding of Function Field. | 430 // SPECIAL2 Encoding of Function Field. |
408 MUL = ((0 << 3) + 2), | 431 MUL = ((0 << 3) + 2), |
409 CLZ = ((4 << 3) + 0), | 432 CLZ = ((4 << 3) + 0), |
410 CLO = ((4 << 3) + 1), | 433 CLO = ((4 << 3) + 1), |
411 | 434 |
412 // SPECIAL3 Encoding of Function Field. | 435 // SPECIAL3 Encoding of Function Field. |
413 EXT = ((0 << 3) + 0), | 436 EXT = ((0 << 3) + 0), |
414 DEXTM = ((0 << 3) + 1), | 437 DEXTM = ((0 << 3) + 1), |
415 DEXTU = ((0 << 3) + 2), | 438 DEXTU = ((0 << 3) + 2), |
416 DEXT = ((0 << 3) + 3), | 439 DEXT = ((0 << 3) + 3), |
417 INS = ((0 << 3) + 4), | 440 INS = ((0 << 3) + 4), |
418 DINSM = ((0 << 3) + 5), | 441 DINSM = ((0 << 3) + 5), |
419 DINSU = ((0 << 3) + 6), | 442 DINSU = ((0 << 3) + 6), |
420 DINS = ((0 << 3) + 7), | 443 DINS = ((0 << 3) + 7), |
421 | 444 |
422 DSBH = ((4 << 3) + 4), | 445 DSBH = ((4 << 3) + 4), |
423 | 446 |
424 // REGIMM encoding of rt Field. | 447 // REGIMM encoding of rt Field. |
425 BLTZ = ((0 << 3) + 0) << 16, | 448 BLTZ = ((0 << 3) + 0) << 16, |
426 BGEZ = ((0 << 3) + 1) << 16, | 449 BGEZ = ((0 << 3) + 1) << 16, |
427 BLTZAL = ((2 << 3) + 0) << 16, | 450 BLTZAL = ((2 << 3) + 0) << 16, |
428 BGEZAL = ((2 << 3) + 1) << 16, | 451 BGEZAL = ((2 << 3) + 1) << 16, |
| 452 BGEZALL = ((2 << 3) + 3) << 16, |
| 453 DAHI = ((0 << 3) + 6) << 16, |
| 454 DATI = ((3 << 3) + 6) << 16, |
429 | 455 |
430 // COP1 Encoding of rs Field. | 456 // COP1 Encoding of rs Field. |
431 MFC1 = ((0 << 3) + 0) << 21, | 457 MFC1 = ((0 << 3) + 0) << 21, |
432 DMFC1 = ((0 << 3) + 1) << 21, | 458 DMFC1 = ((0 << 3) + 1) << 21, |
433 CFC1 = ((0 << 3) + 2) << 21, | 459 CFC1 = ((0 << 3) + 2) << 21, |
434 MFHC1 = ((0 << 3) + 3) << 21, | 460 MFHC1 = ((0 << 3) + 3) << 21, |
435 MTC1 = ((0 << 3) + 4) << 21, | 461 MTC1 = ((0 << 3) + 4) << 21, |
436 DMTC1 = ((0 << 3) + 5) << 21, | 462 DMTC1 = ((0 << 3) + 5) << 21, |
437 CTC1 = ((0 << 3) + 6) << 21, | 463 CTC1 = ((0 << 3) + 6) << 21, |
438 MTHC1 = ((0 << 3) + 7) << 21, | 464 MTHC1 = ((0 << 3) + 7) << 21, |
(...skipping 26 matching lines...) Expand all Loading... |
465 MOV_D = ((0 << 3) + 6), | 491 MOV_D = ((0 << 3) + 6), |
466 NEG_D = ((0 << 3) + 7), | 492 NEG_D = ((0 << 3) + 7), |
467 ROUND_L_D = ((1 << 3) + 0), | 493 ROUND_L_D = ((1 << 3) + 0), |
468 TRUNC_L_D = ((1 << 3) + 1), | 494 TRUNC_L_D = ((1 << 3) + 1), |
469 CEIL_L_D = ((1 << 3) + 2), | 495 CEIL_L_D = ((1 << 3) + 2), |
470 FLOOR_L_D = ((1 << 3) + 3), | 496 FLOOR_L_D = ((1 << 3) + 3), |
471 ROUND_W_D = ((1 << 3) + 4), | 497 ROUND_W_D = ((1 << 3) + 4), |
472 TRUNC_W_D = ((1 << 3) + 5), | 498 TRUNC_W_D = ((1 << 3) + 5), |
473 CEIL_W_D = ((1 << 3) + 6), | 499 CEIL_W_D = ((1 << 3) + 6), |
474 FLOOR_W_D = ((1 << 3) + 7), | 500 FLOOR_W_D = ((1 << 3) + 7), |
| 501 MIN = ((3 << 3) + 4), |
| 502 MINA = ((3 << 3) + 5), |
| 503 MAX = ((3 << 3) + 6), |
| 504 MAXA = ((3 << 3) + 7), |
475 CVT_S_D = ((4 << 3) + 0), | 505 CVT_S_D = ((4 << 3) + 0), |
476 CVT_W_D = ((4 << 3) + 4), | 506 CVT_W_D = ((4 << 3) + 4), |
477 CVT_L_D = ((4 << 3) + 5), | 507 CVT_L_D = ((4 << 3) + 5), |
478 C_F_D = ((6 << 3) + 0), | 508 C_F_D = ((6 << 3) + 0), |
479 C_UN_D = ((6 << 3) + 1), | 509 C_UN_D = ((6 << 3) + 1), |
480 C_EQ_D = ((6 << 3) + 2), | 510 C_EQ_D = ((6 << 3) + 2), |
481 C_UEQ_D = ((6 << 3) + 3), | 511 C_UEQ_D = ((6 << 3) + 3), |
482 C_OLT_D = ((6 << 3) + 4), | 512 C_OLT_D = ((6 << 3) + 4), |
483 C_ULT_D = ((6 << 3) + 5), | 513 C_ULT_D = ((6 << 3) + 5), |
484 C_OLE_D = ((6 << 3) + 6), | 514 C_OLE_D = ((6 << 3) + 6), |
485 C_ULE_D = ((6 << 3) + 7), | 515 C_ULE_D = ((6 << 3) + 7), |
486 // COP1 Encoding of Function Field When rs=W or L. | 516 // COP1 Encoding of Function Field When rs=W or L. |
487 CVT_S_W = ((4 << 3) + 0), | 517 CVT_S_W = ((4 << 3) + 0), |
488 CVT_D_W = ((4 << 3) + 1), | 518 CVT_D_W = ((4 << 3) + 1), |
489 CVT_S_L = ((4 << 3) + 0), | 519 CVT_S_L = ((4 << 3) + 0), |
490 CVT_D_L = ((4 << 3) + 1), | 520 CVT_D_L = ((4 << 3) + 1), |
| 521 BC1EQZ = ((2 << 2) + 1) << 21, |
| 522 BC1NEZ = ((3 << 2) + 1) << 21, |
| 523 // COP1 CMP positive predicates Bit 5..4 = 00. |
| 524 CMP_AF = ((0 << 3) + 0), |
| 525 CMP_UN = ((0 << 3) + 1), |
| 526 CMP_EQ = ((0 << 3) + 2), |
| 527 CMP_UEQ = ((0 << 3) + 3), |
| 528 CMP_LT = ((0 << 3) + 4), |
| 529 CMP_ULT = ((0 << 3) + 5), |
| 530 CMP_LE = ((0 << 3) + 6), |
| 531 CMP_ULE = ((0 << 3) + 7), |
| 532 CMP_SAF = ((1 << 3) + 0), |
| 533 CMP_SUN = ((1 << 3) + 1), |
| 534 CMP_SEQ = ((1 << 3) + 2), |
| 535 CMP_SUEQ = ((1 << 3) + 3), |
| 536 CMP_SSLT = ((1 << 3) + 4), |
| 537 CMP_SSULT = ((1 << 3) + 5), |
| 538 CMP_SLE = ((1 << 3) + 6), |
| 539 CMP_SULE = ((1 << 3) + 7), |
| 540 // COP1 CMP negative predicates Bit 5..4 = 01. |
| 541 CMP_AT = ((2 << 3) + 0), // Reserved, not implemented. |
| 542 CMP_OR = ((2 << 3) + 1), |
| 543 CMP_UNE = ((2 << 3) + 2), |
| 544 CMP_NE = ((2 << 3) + 3), |
| 545 CMP_UGE = ((2 << 3) + 4), // Reserved, not implemented. |
| 546 CMP_OGE = ((2 << 3) + 5), // Reserved, not implemented. |
| 547 CMP_UGT = ((2 << 3) + 6), // Reserved, not implemented. |
| 548 CMP_OGT = ((2 << 3) + 7), // Reserved, not implemented. |
| 549 CMP_SAT = ((3 << 3) + 0), // Reserved, not implemented. |
| 550 CMP_SOR = ((3 << 3) + 1), |
| 551 CMP_SUNE = ((3 << 3) + 2), |
| 552 CMP_SNE = ((3 << 3) + 3), |
| 553 CMP_SUGE = ((3 << 3) + 4), // Reserved, not implemented. |
| 554 CMP_SOGE = ((3 << 3) + 5), // Reserved, not implemented. |
| 555 CMP_SUGT = ((3 << 3) + 6), // Reserved, not implemented. |
| 556 CMP_SOGT = ((3 << 3) + 7), // Reserved, not implemented. |
| 557 |
| 558 SEL = ((2 << 3) + 0), |
| 559 SELEQZ_C = ((2 << 3) + 4), // COP1 on FPR registers. |
| 560 SELNEZ_C = ((2 << 3) + 7), // COP1 on FPR registers. |
| 561 |
491 // COP1 Encoding of Function Field When rs=PS. | 562 // COP1 Encoding of Function Field When rs=PS. |
492 // COP1X Encoding of Function Field. | 563 // COP1X Encoding of Function Field. |
493 MADD_D = ((4 << 3) + 1), | 564 MADD_D = ((4 << 3) + 1), |
494 | 565 |
495 NULLSF = 0 | 566 NULLSF = 0 |
496 }; | 567 }; |
497 | 568 |
498 | 569 |
499 // ----- Emulated conditions. | 570 // ----- Emulated conditions. |
500 // On MIPS we use this enum to abstract from conditionnal branch instructions. | 571 // On MIPS we use this enum to abstract from conditional branch instructions. |
501 // The 'U' prefix is used to specify unsigned comparisons. | 572 // The 'U' prefix is used to specify unsigned comparisons. |
502 // Oppposite conditions must be paired as odd/even numbers | 573 // Opposite conditions must be paired as odd/even numbers |
503 // because 'NegateCondition' function flips LSB to negate condition. | 574 // because 'NegateCondition' function flips LSB to negate condition. |
504 enum Condition { | 575 enum Condition { |
505 // Any value < 0 is considered no_condition. | 576 // Any value < 0 is considered no_condition. |
506 kNoCondition = -1, | 577 kNoCondition = -1, |
507 | 578 |
508 overflow = 0, | 579 overflow = 0, |
509 no_overflow = 1, | 580 no_overflow = 1, |
510 Uless = 2, | 581 Uless = 2, |
511 Ugreater_equal= 3, | 582 Ugreater_equal= 3, |
512 equal = 4, | 583 equal = 4, |
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826 default: | 897 default: |
827 return NULLSF; | 898 return NULLSF; |
828 } | 899 } |
829 } | 900 } |
830 | 901 |
831 inline int32_t Imm16Value() const { | 902 inline int32_t Imm16Value() const { |
832 ASSERT(InstructionType() == kImmediateType); | 903 ASSERT(InstructionType() == kImmediateType); |
833 return Bits(kImm16Shift + kImm16Bits - 1, kImm16Shift); | 904 return Bits(kImm16Shift + kImm16Bits - 1, kImm16Shift); |
834 } | 905 } |
835 | 906 |
| 907 inline int32_t Imm21Value() const { |
| 908 ASSERT(InstructionType() == kImmediateType); |
| 909 return Bits(kImm21Shift + kImm21Bits - 1, kImm21Shift); |
| 910 } |
| 911 |
836 inline int32_t Imm26Value() const { | 912 inline int32_t Imm26Value() const { |
837 ASSERT(InstructionType() == kJumpType); | 913 ASSERT(InstructionType() == kJumpType); |
838 return Bits(kImm26Shift + kImm26Bits - 1, kImm26Shift); | 914 return Bits(kImm26Shift + kImm26Bits - 1, kImm26Shift); |
839 } | 915 } |
840 | 916 |
841 // Say if the instruction should not be used in a branch delay slot. | 917 // Say if the instruction should not be used in a branch delay slot. |
842 bool IsForbiddenInBranchDelay() const; | 918 bool IsForbiddenInBranchDelay() const; |
843 // Say if the instruction 'links'. e.g. jal, bal. | 919 // Say if the instruction 'links'. e.g. jal, bal. |
844 bool IsLinkingInstruction() const; | 920 bool IsLinkingInstruction() const; |
845 // Say if the instruction is a break or a trap. | 921 // Say if the instruction is a break or a trap. |
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867 | 943 |
868 // TODO(plind): below should be based on kPointerSize | 944 // TODO(plind): below should be based on kPointerSize |
869 // TODO(plind): find all usages and remove the needless instructions for n64. | 945 // TODO(plind): find all usages and remove the needless instructions for n64. |
870 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2; | 946 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2; |
871 | 947 |
872 const int kBranchReturnOffset = 2 * Instruction::kInstrSize; | 948 const int kBranchReturnOffset = 2 * Instruction::kInstrSize; |
873 | 949 |
874 } } // namespace v8::internal | 950 } } // namespace v8::internal |
875 | 951 |
876 #endif // #ifndef V8_MIPS_CONSTANTS_H_ | 952 #endif // #ifndef V8_MIPS_CONSTANTS_H_ |
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