MIPS: Move ldc1/sdc1 to macro-assembler.

MIPS: Move ldc1/sdc1 to macro-assembler.

For MIPS32, instructions ldc1 and sdc1 are moved into macro-assembler
and renamed as Ldc1 and Sdc1. The reason for placing them into
macro-assembler is that they emmit two or three instructions.

TEST=test/cctest/test-assembler-mips,
     test/cctest/test-code-stubs-mips,
     test/cctest/test-macro-assembler-mips
BUG=

Review-Url: https://codereview.chromium.org/2751973002
Cr-Commit-Position: refs/heads/master@{#43977}
Committed: https://chromium.googlesource.com/v8/v8/+/47da8de250ca2b9ba37f69d7520bbf9df1ab127d

[Ilija.Pavlovic1, 2017-03-15 14:16:40]

ilija.pavlovic@imgtec.com changed reviewers:
+ ivica.bogosavljevic@imgtec.com, miran.karic@imgtec.com

[Ilija.Pavlovic1, 2017-03-15 14:16:40]

ilija.pavlovic@imgtec.com changed reviewers:
+ ivica.bogosavljevic@imgtec.com, miran.karic@imgtec.com

[Ilija.Pavlovic1, 2017-03-15 14:16:42]

PTAL

[Ilija.Pavlovic1, 2017-03-15 14:16:42]

PTAL

[miran.karic, 2017-03-15 14:29:11]

miran.karic@imgtec.com changed reviewers:
+ Miran.Karic@imgtec.com

[miran.karic, 2017-03-15 14:29:12]

lgtm

[ivica.bogosavljevic, 2017-03-21 09:39:00]

ivica.bogosavljevic@imgtec.com changed reviewers:
- Miran.Karic@imgtec.com

[ivica.bogosavljevic, 2017-03-21 09:39:00]

lgtm

[Ilija.Pavlovic1, 2017-03-21 11:12:57]

The CQ bit was checked by ilija.pavlovic@imgtec.com

[commit-bot: I haz the power, 2017-03-21 11:13:09]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2017-03-21 11:35:41]

CQ is committing da patch.

Bot data: {"patchset_id": 1, "attempt_start_ts": 1490094777358690, "parent_rev":
"3214ccf39b511d4a89913f1c4ab6fa15c1fcb522", "commit_rev":
"47da8de250ca2b9ba37f69d7520bbf9df1ab127d"}

[commit-bot: I haz the power, 2017-03-21 11:35:46]

Description was changed from

==========
MIPS: Move ldc1/sdc1 to macro-assembler.

For MIPS32, instructions ldc1 and sdc1 are moved into macro-assembler
and renamed as Ldc1 and Sdc1. The reason for placing them into
macro-assembler is that they emmit two or three instructions.

TEST=test/cctest/test-assembler-mips,
     test/cctest/test-code-stubs-mips,
     test/cctest/test-macro-assembler-mips
BUG=
==========

to

==========
MIPS: Move ldc1/sdc1 to macro-assembler.

For MIPS32, instructions ldc1 and sdc1 are moved into macro-assembler
and renamed as Ldc1 and Sdc1. The reason for placing them into
macro-assembler is that they emmit two or three instructions.

TEST=test/cctest/test-assembler-mips,
     test/cctest/test-code-stubs-mips,
     test/cctest/test-macro-assembler-mips
BUG=

Review-Url: https://codereview.chromium.org/2751973002
Cr-Commit-Position: refs/heads/master@{#43977}
Committed:
https://chromium.googlesource.com/v8/v8/+/47da8de250ca2b9ba37f69d7520bbf9df1a...
==========

[commit-bot: I haz the power, 2017-03-21 11:35:47]

Committed patchset #1 (id:1) as
https://chromium.googlesource.com/v8/v8/+/47da8de250ca2b9ba37f69d7520bbf9df1a...