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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 #include "src/compilation-info.h" | 6 #include "src/compilation-info.h" |
7 #include "src/compiler/code-generator-impl.h" | 7 #include "src/compiler/code-generator-impl.h" |
8 #include "src/compiler/gap-resolver.h" | 8 #include "src/compiler/gap-resolver.h" |
9 #include "src/compiler/node-matchers.h" | 9 #include "src/compiler/node-matchers.h" |
10 #include "src/compiler/osr.h" | 10 #include "src/compiler/osr.h" |
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1465 size_t index = 0; | 1465 size_t index = 0; |
1466 MemOperand operand = i.MemoryOperand(&index); | 1466 MemOperand operand = i.MemoryOperand(&index); |
1467 FPURegister ft = i.InputOrZeroSingleRegister(index); | 1467 FPURegister ft = i.InputOrZeroSingleRegister(index); |
1468 if (ft.is(kDoubleRegZero) && !__ IsDoubleZeroRegSet()) { | 1468 if (ft.is(kDoubleRegZero) && !__ IsDoubleZeroRegSet()) { |
1469 __ Move(kDoubleRegZero, 0.0); | 1469 __ Move(kDoubleRegZero, 0.0); |
1470 } | 1470 } |
1471 __ Uswc1(ft, operand, kScratchReg); | 1471 __ Uswc1(ft, operand, kScratchReg); |
1472 break; | 1472 break; |
1473 } | 1473 } |
1474 case kMipsLdc1: | 1474 case kMipsLdc1: |
1475 __ ldc1(i.OutputDoubleRegister(), i.MemoryOperand()); | 1475 __ Ldc1(i.OutputDoubleRegister(), i.MemoryOperand()); |
1476 break; | 1476 break; |
1477 case kMipsUldc1: | 1477 case kMipsUldc1: |
1478 __ Uldc1(i.OutputDoubleRegister(), i.MemoryOperand(), kScratchReg); | 1478 __ Uldc1(i.OutputDoubleRegister(), i.MemoryOperand(), kScratchReg); |
1479 break; | 1479 break; |
1480 case kMipsSdc1: { | 1480 case kMipsSdc1: { |
1481 FPURegister ft = i.InputOrZeroDoubleRegister(2); | 1481 FPURegister ft = i.InputOrZeroDoubleRegister(2); |
1482 if (ft.is(kDoubleRegZero) && !__ IsDoubleZeroRegSet()) { | 1482 if (ft.is(kDoubleRegZero) && !__ IsDoubleZeroRegSet()) { |
1483 __ Move(kDoubleRegZero, 0.0); | 1483 __ Move(kDoubleRegZero, 0.0); |
1484 } | 1484 } |
1485 __ sdc1(ft, i.MemoryOperand()); | 1485 __ Sdc1(ft, i.MemoryOperand()); |
1486 break; | 1486 break; |
1487 } | 1487 } |
1488 case kMipsUsdc1: { | 1488 case kMipsUsdc1: { |
1489 FPURegister ft = i.InputOrZeroDoubleRegister(2); | 1489 FPURegister ft = i.InputOrZeroDoubleRegister(2); |
1490 if (ft.is(kDoubleRegZero) && !__ IsDoubleZeroRegSet()) { | 1490 if (ft.is(kDoubleRegZero) && !__ IsDoubleZeroRegSet()) { |
1491 __ Move(kDoubleRegZero, 0.0); | 1491 __ Move(kDoubleRegZero, 0.0); |
1492 } | 1492 } |
1493 __ Usdc1(ft, i.MemoryOperand(), kScratchReg); | 1493 __ Usdc1(ft, i.MemoryOperand(), kScratchReg); |
1494 break; | 1494 break; |
1495 } | 1495 } |
1496 case kMipsPush: | 1496 case kMipsPush: |
1497 if (instr->InputAt(0)->IsFPRegister()) { | 1497 if (instr->InputAt(0)->IsFPRegister()) { |
1498 __ sdc1(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize)); | 1498 __ Sdc1(i.InputDoubleRegister(0), MemOperand(sp, -kDoubleSize)); |
1499 __ Subu(sp, sp, Operand(kDoubleSize)); | 1499 __ Subu(sp, sp, Operand(kDoubleSize)); |
1500 frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize); | 1500 frame_access_state()->IncreaseSPDelta(kDoubleSize / kPointerSize); |
1501 } else { | 1501 } else { |
1502 __ Push(i.InputRegister(0)); | 1502 __ Push(i.InputRegister(0)); |
1503 frame_access_state()->IncreaseSPDelta(1); | 1503 frame_access_state()->IncreaseSPDelta(1); |
1504 } | 1504 } |
1505 break; | 1505 break; |
1506 case kMipsStackClaim: { | 1506 case kMipsStackClaim: { |
1507 __ Subu(sp, sp, Operand(i.InputInt32(0))); | 1507 __ Subu(sp, sp, Operand(i.InputInt32(0))); |
1508 frame_access_state()->IncreaseSPDelta(i.InputInt32(0) / kPointerSize); | 1508 frame_access_state()->IncreaseSPDelta(i.InputInt32(0) / kPointerSize); |
1509 break; | 1509 break; |
1510 } | 1510 } |
1511 case kMipsStoreToStackSlot: { | 1511 case kMipsStoreToStackSlot: { |
1512 if (instr->InputAt(0)->IsFPRegister()) { | 1512 if (instr->InputAt(0)->IsFPRegister()) { |
1513 LocationOperand* op = LocationOperand::cast(instr->InputAt(0)); | 1513 LocationOperand* op = LocationOperand::cast(instr->InputAt(0)); |
1514 if (op->representation() == MachineRepresentation::kFloat64) { | 1514 if (op->representation() == MachineRepresentation::kFloat64) { |
1515 __ sdc1(i.InputDoubleRegister(0), MemOperand(sp, i.InputInt32(1))); | 1515 __ Sdc1(i.InputDoubleRegister(0), MemOperand(sp, i.InputInt32(1))); |
1516 } else { | 1516 } else { |
1517 DCHECK_EQ(MachineRepresentation::kFloat32, op->representation()); | 1517 DCHECK_EQ(MachineRepresentation::kFloat32, op->representation()); |
1518 __ swc1(i.InputSingleRegister(0), MemOperand(sp, i.InputInt32(1))); | 1518 __ swc1(i.InputSingleRegister(0), MemOperand(sp, i.InputInt32(1))); |
1519 } | 1519 } |
1520 } else { | 1520 } else { |
1521 __ sw(i.InputRegister(0), MemOperand(sp, i.InputInt32(1))); | 1521 __ sw(i.InputRegister(0), MemOperand(sp, i.InputInt32(1))); |
1522 } | 1522 } |
1523 break; | 1523 break; |
1524 } | 1524 } |
1525 case kMipsByteSwap32: { | 1525 case kMipsByteSwap32: { |
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1538 case kCheckedLoadUint16: | 1538 case kCheckedLoadUint16: |
1539 ASSEMBLE_CHECKED_LOAD_INTEGER(lhu); | 1539 ASSEMBLE_CHECKED_LOAD_INTEGER(lhu); |
1540 break; | 1540 break; |
1541 case kCheckedLoadWord32: | 1541 case kCheckedLoadWord32: |
1542 ASSEMBLE_CHECKED_LOAD_INTEGER(lw); | 1542 ASSEMBLE_CHECKED_LOAD_INTEGER(lw); |
1543 break; | 1543 break; |
1544 case kCheckedLoadFloat32: | 1544 case kCheckedLoadFloat32: |
1545 ASSEMBLE_CHECKED_LOAD_FLOAT(Single, lwc1); | 1545 ASSEMBLE_CHECKED_LOAD_FLOAT(Single, lwc1); |
1546 break; | 1546 break; |
1547 case kCheckedLoadFloat64: | 1547 case kCheckedLoadFloat64: |
1548 ASSEMBLE_CHECKED_LOAD_FLOAT(Double, ldc1); | 1548 ASSEMBLE_CHECKED_LOAD_FLOAT(Double, Ldc1); |
1549 break; | 1549 break; |
1550 case kCheckedStoreWord8: | 1550 case kCheckedStoreWord8: |
1551 ASSEMBLE_CHECKED_STORE_INTEGER(sb); | 1551 ASSEMBLE_CHECKED_STORE_INTEGER(sb); |
1552 break; | 1552 break; |
1553 case kCheckedStoreWord16: | 1553 case kCheckedStoreWord16: |
1554 ASSEMBLE_CHECKED_STORE_INTEGER(sh); | 1554 ASSEMBLE_CHECKED_STORE_INTEGER(sh); |
1555 break; | 1555 break; |
1556 case kCheckedStoreWord32: | 1556 case kCheckedStoreWord32: |
1557 ASSEMBLE_CHECKED_STORE_INTEGER(sw); | 1557 ASSEMBLE_CHECKED_STORE_INTEGER(sw); |
1558 break; | 1558 break; |
1559 case kCheckedStoreFloat32: | 1559 case kCheckedStoreFloat32: |
1560 ASSEMBLE_CHECKED_STORE_FLOAT(Single, swc1); | 1560 ASSEMBLE_CHECKED_STORE_FLOAT(Single, swc1); |
1561 break; | 1561 break; |
1562 case kCheckedStoreFloat64: | 1562 case kCheckedStoreFloat64: |
1563 ASSEMBLE_CHECKED_STORE_FLOAT(Double, sdc1); | 1563 ASSEMBLE_CHECKED_STORE_FLOAT(Double, Sdc1); |
1564 break; | 1564 break; |
1565 case kCheckedLoadWord64: | 1565 case kCheckedLoadWord64: |
1566 case kCheckedStoreWord64: | 1566 case kCheckedStoreWord64: |
1567 UNREACHABLE(); // currently unsupported checked int64 load/store. | 1567 UNREACHABLE(); // currently unsupported checked int64 load/store. |
1568 break; | 1568 break; |
1569 case kAtomicLoadInt8: | 1569 case kAtomicLoadInt8: |
1570 ASSEMBLE_ATOMIC_LOAD_INTEGER(lb); | 1570 ASSEMBLE_ATOMIC_LOAD_INTEGER(lb); |
1571 break; | 1571 break; |
1572 case kAtomicLoadUint8: | 1572 case kAtomicLoadUint8: |
1573 ASSEMBLE_ATOMIC_LOAD_INTEGER(lbu); | 1573 ASSEMBLE_ATOMIC_LOAD_INTEGER(lbu); |
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2208 FloatRegister dst = g.ToSingleRegister(destination); | 2208 FloatRegister dst = g.ToSingleRegister(destination); |
2209 __ Move(dst, src.ToFloat32()); | 2209 __ Move(dst, src.ToFloat32()); |
2210 } | 2210 } |
2211 } else { | 2211 } else { |
2212 DCHECK_EQ(Constant::kFloat64, src.type()); | 2212 DCHECK_EQ(Constant::kFloat64, src.type()); |
2213 DoubleRegister dst = destination->IsFPRegister() | 2213 DoubleRegister dst = destination->IsFPRegister() |
2214 ? g.ToDoubleRegister(destination) | 2214 ? g.ToDoubleRegister(destination) |
2215 : kScratchDoubleReg; | 2215 : kScratchDoubleReg; |
2216 __ Move(dst, src.ToFloat64()); | 2216 __ Move(dst, src.ToFloat64()); |
2217 if (destination->IsFPStackSlot()) { | 2217 if (destination->IsFPStackSlot()) { |
2218 __ sdc1(dst, g.ToMemOperand(destination)); | 2218 __ Sdc1(dst, g.ToMemOperand(destination)); |
2219 } | 2219 } |
2220 } | 2220 } |
2221 } else if (source->IsFPRegister()) { | 2221 } else if (source->IsFPRegister()) { |
2222 FPURegister src = g.ToDoubleRegister(source); | 2222 FPURegister src = g.ToDoubleRegister(source); |
2223 if (destination->IsFPRegister()) { | 2223 if (destination->IsFPRegister()) { |
2224 FPURegister dst = g.ToDoubleRegister(destination); | 2224 FPURegister dst = g.ToDoubleRegister(destination); |
2225 __ Move(dst, src); | 2225 __ Move(dst, src); |
2226 } else { | 2226 } else { |
2227 DCHECK(destination->IsFPStackSlot()); | 2227 DCHECK(destination->IsFPStackSlot()); |
2228 MachineRepresentation rep = | 2228 MachineRepresentation rep = |
2229 LocationOperand::cast(source)->representation(); | 2229 LocationOperand::cast(source)->representation(); |
2230 if (rep == MachineRepresentation::kFloat64) { | 2230 if (rep == MachineRepresentation::kFloat64) { |
2231 __ sdc1(src, g.ToMemOperand(destination)); | 2231 __ Sdc1(src, g.ToMemOperand(destination)); |
2232 } else if (rep == MachineRepresentation::kFloat32) { | 2232 } else if (rep == MachineRepresentation::kFloat32) { |
2233 __ swc1(src, g.ToMemOperand(destination)); | 2233 __ swc1(src, g.ToMemOperand(destination)); |
2234 } else { | 2234 } else { |
2235 DCHECK_EQ(MachineRepresentation::kSimd128, rep); | 2235 DCHECK_EQ(MachineRepresentation::kSimd128, rep); |
2236 UNREACHABLE(); | 2236 UNREACHABLE(); |
2237 } | 2237 } |
2238 } | 2238 } |
2239 } else if (source->IsFPStackSlot()) { | 2239 } else if (source->IsFPStackSlot()) { |
2240 DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot()); | 2240 DCHECK(destination->IsFPRegister() || destination->IsFPStackSlot()); |
2241 MemOperand src = g.ToMemOperand(source); | 2241 MemOperand src = g.ToMemOperand(source); |
2242 MachineRepresentation rep = LocationOperand::cast(source)->representation(); | 2242 MachineRepresentation rep = LocationOperand::cast(source)->representation(); |
2243 if (destination->IsFPRegister()) { | 2243 if (destination->IsFPRegister()) { |
2244 if (rep == MachineRepresentation::kFloat64) { | 2244 if (rep == MachineRepresentation::kFloat64) { |
2245 __ ldc1(g.ToDoubleRegister(destination), src); | 2245 __ Ldc1(g.ToDoubleRegister(destination), src); |
2246 } else if (rep == MachineRepresentation::kFloat32) { | 2246 } else if (rep == MachineRepresentation::kFloat32) { |
2247 __ lwc1(g.ToDoubleRegister(destination), src); | 2247 __ lwc1(g.ToDoubleRegister(destination), src); |
2248 } else { | 2248 } else { |
2249 DCHECK_EQ(MachineRepresentation::kSimd128, rep); | 2249 DCHECK_EQ(MachineRepresentation::kSimd128, rep); |
2250 UNREACHABLE(); | 2250 UNREACHABLE(); |
2251 } | 2251 } |
2252 } else { | 2252 } else { |
2253 FPURegister temp = kScratchDoubleReg; | 2253 FPURegister temp = kScratchDoubleReg; |
2254 if (rep == MachineRepresentation::kFloat64) { | 2254 if (rep == MachineRepresentation::kFloat64) { |
2255 __ ldc1(temp, src); | 2255 __ Ldc1(temp, src); |
2256 __ sdc1(temp, g.ToMemOperand(destination)); | 2256 __ Sdc1(temp, g.ToMemOperand(destination)); |
2257 } else if (rep == MachineRepresentation::kFloat32) { | 2257 } else if (rep == MachineRepresentation::kFloat32) { |
2258 __ lwc1(temp, src); | 2258 __ lwc1(temp, src); |
2259 __ swc1(temp, g.ToMemOperand(destination)); | 2259 __ swc1(temp, g.ToMemOperand(destination)); |
2260 } else { | 2260 } else { |
2261 DCHECK_EQ(MachineRepresentation::kSimd128, rep); | 2261 DCHECK_EQ(MachineRepresentation::kSimd128, rep); |
2262 UNREACHABLE(); | 2262 UNREACHABLE(); |
2263 } | 2263 } |
2264 } | 2264 } |
2265 } else { | 2265 } else { |
2266 UNREACHABLE(); | 2266 UNREACHABLE(); |
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2307 __ Move(temp, src); | 2307 __ Move(temp, src); |
2308 __ Move(src, dst); | 2308 __ Move(src, dst); |
2309 __ Move(dst, temp); | 2309 __ Move(dst, temp); |
2310 } else { | 2310 } else { |
2311 DCHECK(destination->IsFPStackSlot()); | 2311 DCHECK(destination->IsFPStackSlot()); |
2312 MemOperand dst = g.ToMemOperand(destination); | 2312 MemOperand dst = g.ToMemOperand(destination); |
2313 MachineRepresentation rep = | 2313 MachineRepresentation rep = |
2314 LocationOperand::cast(source)->representation(); | 2314 LocationOperand::cast(source)->representation(); |
2315 if (rep == MachineRepresentation::kFloat64) { | 2315 if (rep == MachineRepresentation::kFloat64) { |
2316 __ Move(temp, src); | 2316 __ Move(temp, src); |
2317 __ ldc1(src, dst); | 2317 __ Ldc1(src, dst); |
2318 __ sdc1(temp, dst); | 2318 __ Sdc1(temp, dst); |
2319 } else if (rep == MachineRepresentation::kFloat32) { | 2319 } else if (rep == MachineRepresentation::kFloat32) { |
2320 __ Move(temp, src); | 2320 __ Move(temp, src); |
2321 __ lwc1(src, dst); | 2321 __ lwc1(src, dst); |
2322 __ swc1(temp, dst); | 2322 __ swc1(temp, dst); |
2323 } else { | 2323 } else { |
2324 DCHECK_EQ(MachineRepresentation::kSimd128, rep); | 2324 DCHECK_EQ(MachineRepresentation::kSimd128, rep); |
2325 UNREACHABLE(); | 2325 UNREACHABLE(); |
2326 } | 2326 } |
2327 } | 2327 } |
2328 } else if (source->IsFPStackSlot()) { | 2328 } else if (source->IsFPStackSlot()) { |
2329 DCHECK(destination->IsFPStackSlot()); | 2329 DCHECK(destination->IsFPStackSlot()); |
2330 Register temp_0 = kScratchReg; | 2330 Register temp_0 = kScratchReg; |
2331 FPURegister temp_1 = kScratchDoubleReg; | 2331 FPURegister temp_1 = kScratchDoubleReg; |
2332 MemOperand src0 = g.ToMemOperand(source); | 2332 MemOperand src0 = g.ToMemOperand(source); |
2333 MemOperand dst0 = g.ToMemOperand(destination); | 2333 MemOperand dst0 = g.ToMemOperand(destination); |
2334 MachineRepresentation rep = LocationOperand::cast(source)->representation(); | 2334 MachineRepresentation rep = LocationOperand::cast(source)->representation(); |
2335 if (rep == MachineRepresentation::kFloat64) { | 2335 if (rep == MachineRepresentation::kFloat64) { |
2336 MemOperand src1(src0.rm(), src0.offset() + kIntSize); | 2336 MemOperand src1(src0.rm(), src0.offset() + kIntSize); |
2337 MemOperand dst1(dst0.rm(), dst0.offset() + kIntSize); | 2337 MemOperand dst1(dst0.rm(), dst0.offset() + kIntSize); |
2338 __ ldc1(temp_1, dst0); // Save destination in temp_1. | 2338 __ Ldc1(temp_1, dst0); // Save destination in temp_1. |
2339 __ lw(temp_0, src0); // Then use temp_0 to copy source to destination. | 2339 __ lw(temp_0, src0); // Then use temp_0 to copy source to destination. |
2340 __ sw(temp_0, dst0); | 2340 __ sw(temp_0, dst0); |
2341 __ lw(temp_0, src1); | 2341 __ lw(temp_0, src1); |
2342 __ sw(temp_0, dst1); | 2342 __ sw(temp_0, dst1); |
2343 __ sdc1(temp_1, src0); | 2343 __ Sdc1(temp_1, src0); |
2344 } else if (rep == MachineRepresentation::kFloat32) { | 2344 } else if (rep == MachineRepresentation::kFloat32) { |
2345 __ lwc1(temp_1, dst0); // Save destination in temp_1. | 2345 __ lwc1(temp_1, dst0); // Save destination in temp_1. |
2346 __ lw(temp_0, src0); // Then use temp_0 to copy source to destination. | 2346 __ lw(temp_0, src0); // Then use temp_0 to copy source to destination. |
2347 __ sw(temp_0, dst0); | 2347 __ sw(temp_0, dst0); |
2348 __ swc1(temp_1, src0); | 2348 __ swc1(temp_1, src0); |
2349 } else { | 2349 } else { |
2350 DCHECK_EQ(MachineRepresentation::kSimd128, rep); | 2350 DCHECK_EQ(MachineRepresentation::kSimd128, rep); |
2351 UNREACHABLE(); | 2351 UNREACHABLE(); |
2352 } | 2352 } |
2353 } else { | 2353 } else { |
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2383 padding_size -= v8::internal::Assembler::kInstrSize; | 2383 padding_size -= v8::internal::Assembler::kInstrSize; |
2384 } | 2384 } |
2385 } | 2385 } |
2386 } | 2386 } |
2387 | 2387 |
2388 #undef __ | 2388 #undef __ |
2389 | 2389 |
2390 } // namespace compiler | 2390 } // namespace compiler |
2391 } // namespace internal | 2391 } // namespace internal |
2392 } // namespace v8 | 2392 } // namespace v8 |
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