MIPS[64]: Support for MSA instructions

MIPS[64]: Support for MSA instructions

This patch adds support for MIPS SIMD (MSA) instructions in Assembler
and Decoder (disassembler) classes. MSA instructions are implemented for
both mips32 and mips64 architectures.

BUG=

Review-Url: https://codereview.chromium.org/2740123004
Cr-Commit-Position: refs/heads/master@{#44148}
Committed: https://chromium.googlesource.com/v8/v8/+/cd5c0095696f71ed60da2bc41a2da2e5d302a580

[dusan.simicic, 2017-03-10 09:12:55]

dusan.simicic@imgtec.com changed reviewers:
+ ivica.bogosavljevic@imgtec.com, miran.karic@imgtec.com,
v8-mips-ports@googlegroups.com

[dusan.simicic, 2017-03-10 09:12:56]

PTAL

[ivica.bogosavljevic, 2017-03-21 13:50:11]

lgtm 

I would like to see tests for the newly introduced instructions, but not in this
CL but in some other CL.

https://codereview.chromium.org/2740123004/diff/1/src/mips64/assembler-mips64.cc
File src/mips64/assembler-mips64.cc (right):

https://codereview.chromium.org/2740123004/diff/1/src/mips64/assembler-mips64...
src/mips64/assembler-mips64.cc:1142: DCHECK((kArchVariant == kMips64r6) &&
IsEnabled(MIPS_SIMD));
Is a prerequisite to have MSA to have MIPSR6 architecture ?!

[dusan.simicic, 2017-03-21 15:02:26]

On 2017/03/21 13:50:11, ivica.bogosavljevic wrote:
> lgtm 
> 
> I would like to see tests for the newly introduced instructions, but not in
this
> CL but in some other CL.
>

My plan is to add assembler's tests along with patches with support for MSA
instructions in simulator. Is that ok?

https://codereview.chromium.org/2740123004/diff/1/src/mips64/assembler-mips64.cc
File src/mips64/assembler-mips64.cc (right):

https://codereview.chromium.org/2740123004/diff/1/src/mips64/assembler-mips64...
src/mips64/assembler-mips64.cc:1142: DCHECK((kArchVariant == kMips64r6) &&
IsEnabled(MIPS_SIMD));
On 2017/03/21 13:50:11, ivica.bogosavljevic wrote:
> Is a prerequisite to have MSA to have MIPSR6 architecture ?!

MSA instructions are available from MIPSr5 architecture, but we don't have
separate kArchVariant for r5.

[dusan.simicic, 2017-03-27 11:19:08]

The CQ bit was checked by dusan.simicic@imgtec.com to run a CQ dry run

[commit-bot: I haz the power, 2017-03-27 11:19:16]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2017-03-27 11:45:22]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2017-03-27 11:45:23]

Dry run: This issue passed the CQ dry run.

[dusan.simicic, 2017-03-27 12:18:42]

The CQ bit was checked by dusan.simicic@imgtec.com

[commit-bot: I haz the power, 2017-03-27 12:18:55]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2017-03-27 12:21:23]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2017-03-27 12:21:24]

Try jobs failed on following builders:
  v8_presubmit on master.tryserver.v8 (JOB_FAILED,
http://build.chromium.org/p/tryserver.v8/builders/v8_presubmit/builds/37710)

[dusan.simicic, 2017-03-27 12:53:34]

dusan.simicic@imgtec.com changed reviewers:
+ bmeurer@chromium.org, jkummerow@chromium.org

[dusan.simicic, 2017-03-27 12:53:35]

+bmeurer, +jkummerow for cpu.cc and globals.h files

[Jakob Kummerow, 2017-03-27 12:56:27]

lgtm

[dusan.simicic, 2017-03-27 13:17:41]

The CQ bit was checked by dusan.simicic@imgtec.com

[commit-bot: I haz the power, 2017-03-27 13:17:46]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[commit-bot: I haz the power, 2017-03-27 13:20:36]

CQ is committing da patch.

Bot data: {"patchset_id": 1, "attempt_start_ts": 1490620661655910, "parent_rev":
"fc44d57bcbd8c851e7be6c9513edb6e42cb8c245", "commit_rev":
"cd5c0095696f71ed60da2bc41a2da2e5d302a580"}

[commit-bot: I haz the power, 2017-03-27 13:20:42]

Description was changed from

==========
MIPS[64]: Support for MSA instructions

This patch adds support for MIPS SIMD (MSA) instructions in Assembler
and Decoder (disassembler) classes. MSA instructions are implemented for
both mips32 and mips64 architectures.

BUG=
==========

to

==========
MIPS[64]: Support for MSA instructions

This patch adds support for MIPS SIMD (MSA) instructions in Assembler
and Decoder (disassembler) classes. MSA instructions are implemented for
both mips32 and mips64 architectures.

BUG=

Review-Url: https://codereview.chromium.org/2740123004
Cr-Commit-Position: refs/heads/master@{#44148}
Committed:
https://chromium.googlesource.com/v8/v8/+/cd5c0095696f71ed60da2bc41a2da2e5d30...
==========

[commit-bot: I haz the power, 2017-03-27 13:20:43]

Committed patchset #1 (id:1) as
https://chromium.googlesource.com/v8/v8/+/cd5c0095696f71ed60da2bc41a2da2e5d30...