Chromium Code Reviews| Index: runtime/vm/assembler_arm64.cc |
| =================================================================== |
| --- runtime/vm/assembler_arm64.cc (revision 35908) |
| +++ runtime/vm/assembler_arm64.cc (working copy) |
| @@ -696,6 +696,18 @@ |
| } |
| +void Assembler::LoadQFromOffset(VRegister dest, Register base, int32_t offset) { |
| + if (Address::CanHoldOffset(offset, Address::Offset, kQWord)) { |
| + fldrq(dest, Address(base, offset, Address::Offset, kQWord)); |
| + } else { |
| + ASSERT(base != TMP2); |
| + // Since offset is 32-bits, it won't be loaded from the pool. |
|
regis
2014/05/08 17:10:05
But if it was, PP would be used and it would be OK
zra
2014/05/08 18:55:07
Changed to pass a PP or kNoPP so that lower level
|
| + AddImmediate(TMP2, base, offset, kNoPP); |
| + fldrq(dest, Address(TMP2)); |
| + } |
| +} |
| + |
| + |
| void Assembler::StoreToOffset( |
| Register src, Register base, int32_t offset, OperandSize sz) { |
| ASSERT(base != TMP2); |
| @@ -722,6 +734,18 @@ |
| } |
| +void Assembler::StoreQToOffset(VRegister src, Register base, int32_t offset) { |
| + if (Address::CanHoldOffset(offset, Address::Offset, kQWord)) { |
| + fstrq(src, Address(base, offset, Address::Offset, kQWord)); |
| + } else { |
| + ASSERT(base != TMP2); |
| + // Since offset is 32-bits, it won't be loaded from the pool. |
| + AddImmediate(TMP2, base, offset, kNoPP); |
| + fstrq(src, Address(TMP2)); |
| + } |
| +} |
| + |
| + |
| // Store into object. |
| // Preserves object and value registers. |
| void Assembler::StoreIntoObjectFilterNoSmi(Register object, |
| @@ -754,6 +778,20 @@ |
| } |
| +void Assembler::StoreIntoObjectOffset(Register object, |
| + int32_t offset, |
| + Register value, |
| + bool can_value_be_smi) { |
| + if (Address::CanHoldOffset(offset - kHeapObjectTag)) { |
| + StoreIntoObject( |
| + object, FieldAddress(object, offset), value, can_value_be_smi); |
| + } else { |
| + AddImmediate(TMP, object, offset - kHeapObjectTag, PP); |
|
regis
2014/05/08 17:10:05
Why don't you pass kNoPP as above, since the offse
zra
2014/05/08 18:55:07
Done.
|
| + StoreIntoObject(object, Address(TMP), value, can_value_be_smi); |
| + } |
| +} |
| + |
| + |
| void Assembler::StoreIntoObject(Register object, |
| const Address& dest, |
| Register value, |
| @@ -799,17 +837,41 @@ |
| } |
| +void Assembler::StoreIntoObjectOffsetNoBarrier(Register object, |
| + int32_t offset, |
| + Register value) { |
| + if (Address::CanHoldOffset(offset - kHeapObjectTag)) { |
| + StoreIntoObjectNoBarrier(object, FieldAddress(object, offset), value); |
| + } else { |
| + AddImmediate(TMP, object, offset - kHeapObjectTag, PP); |
|
regis
2014/05/08 17:10:05
ditto
zra
2014/05/08 18:55:07
Done.
|
| + StoreIntoObjectNoBarrier(object, Address(TMP), value); |
| + } |
| +} |
| + |
| + |
| void Assembler::StoreIntoObjectNoBarrier(Register object, |
| const Address& dest, |
| const Object& value) { |
| ASSERT(value.IsSmi() || value.InVMHeap() || |
| (value.IsOld() && value.IsNotTemporaryScopedHandle())); |
| // No store buffer update. |
| - LoadObject(TMP, value, PP); |
| - str(TMP, dest); |
| + LoadObject(TMP2, value, PP); |
| + str(TMP2, dest); |
| } |
| +void Assembler::StoreIntoObjectOffsetNoBarrier(Register object, |
| + int32_t offset, |
| + const Object& value) { |
| + if (Address::CanHoldOffset(offset - kHeapObjectTag)) { |
| + StoreIntoObjectNoBarrier(object, FieldAddress(object, offset), value); |
| + } else { |
| + AddImmediate(TMP, object, offset - kHeapObjectTag, PP); |
|
regis
2014/05/08 17:10:05
ditto
zra
2014/05/08 18:55:07
Done.
|
| + StoreIntoObjectNoBarrier(object, Address(TMP), value); |
| + } |
| +} |
| + |
| + |
| void Assembler::LoadClassId(Register result, Register object) { |
| ASSERT(RawObject::kClassIdTagPos == 16); |
| ASSERT(RawObject::kClassIdTagSize == 16); |