Adds single-precision and SIMD load/store to arm64.

runtime/vm/assembler_arm64.h

Index: runtime/vm/assembler_arm64.h
===================================================================
--- runtime/vm/assembler_arm64.h	(revision 35908)
+++ runtime/vm/assembler_arm64.h	(working copy)
@@ -549,7 +549,11 @@
       ASSERT(((a.type() != Address::PreIndex) &&
               (a.type() != Address::PostIndex)) ||
              (rt != a.base()));
-      EmitLoadStoreReg(LDR, rt, a, sz);
+      if (IsSignedOperand(sz)) {
+        EmitLoadStoreReg(LDRS, rt, a, sz);
+      } else {
+        EmitLoadStoreReg(LDR, rt, a, sz);
+      }
     }
   }
   void str(Register rt, Address a, OperandSize sz = kDoubleWord) {
@@ -667,14 +671,36 @@
   void fsqrtd(VRegister vd, VRegister vn) {
     EmitFPOneSourceOp(FSQRTD, vd, vn);
   }
+  void fcvtsd(VRegister vd, VRegister vn) {
+    EmitFPOneSourceOp(FCVTSD, vd, vn);
+  }
+  void fcvtds(VRegister vd, VRegister vn) {
+    EmitFPOneSourceOp(FCVTDS, vd, vn);
+  }
+  void fldrq(VRegister vt, Address a) {
+    ASSERT(a.type() != Address::PCOffset);
+    EmitLoadStoreReg(FLDRQ, static_cast<Register>(vt), a, kByte);
+  }
+  void fstrq(VRegister vt, Address a) {
+    ASSERT(a.type() != Address::PCOffset);
+    EmitLoadStoreReg(FSTRQ, static_cast<Register>(vt), a, kByte);
+  }
   void fldrd(VRegister vt, Address a) {
     ASSERT(a.type() != Address::PCOffset);
-    EmitLoadStoreReg(FLDR, static_cast<Register>(vt), a, kDoubleWord);
+    EmitLoadStoreReg(FLDR, static_cast<Register>(vt), a, kDWord);
   }
   void fstrd(VRegister vt, Address a) {
     ASSERT(a.type() != Address::PCOffset);
-    EmitLoadStoreReg(FSTR, static_cast<Register>(vt), a, kDoubleWord);
+    EmitLoadStoreReg(FSTR, static_cast<Register>(vt), a, kDWord);
   }
+  void fldrs(VRegister vt, Address a) {
+    ASSERT(a.type() != Address::PCOffset);
+    EmitLoadStoreReg(FLDR, static_cast<Register>(vt), a, kSWord);
+  }
+  void fstrs(VRegister vt, Address a) {
+    ASSERT(a.type() != Address::PCOffset);
+    EmitLoadStoreReg(FSTR, static_cast<Register>(vt), a, kSWord);
+  }
   void fcmpd(VRegister vn, VRegister vm) {
     EmitFPCompareOp(FCMPD, vn, vm);
   }
@@ -815,6 +841,10 @@
   void LoadDFieldFromOffset(VRegister dest, Register base, int32_t offset) {
     LoadDFromOffset(dest, base, offset - kHeapObjectTag);
   }
+  void LoadQFromOffset(VRegister dest, Register base, int32_t offset);
+  void LoadQFieldFromOffset(VRegister dest, Register base, int32_t offset) {
+    LoadQFromOffset(dest, base, offset - kHeapObjectTag);
+  }
 
   void StoreToOffset(Register src, Register base, int32_t offset,
                      OperandSize sz = kDoubleWord);
@@ -825,18 +855,32 @@
   void StoreDFieldToOffset(VRegister src, Register base, int32_t offset) {
     StoreDToOffset(src, base, offset - kHeapObjectTag);
   }
+  void StoreQToOffset(VRegister src, Register base, int32_t offset);
+  void StoreQFieldToOffset(VRegister src, Register base, int32_t offset) {
+    StoreQToOffset(src, base, offset - kHeapObjectTag);
+  }
 
   // Storing into an object.
   void StoreIntoObject(Register object,
                        const Address& dest,
                        Register value,
                        bool can_value_be_smi = true);
+  void StoreIntoObjectOffset(Register object,
+                             int32_t offset,
+                             Register value,
+                             bool can_value_be_smi = true);
   void StoreIntoObjectNoBarrier(Register object,
                                 const Address& dest,
                                 Register value);
+  void StoreIntoObjectOffsetNoBarrier(Register object,
+                                      int32_t offset,
+                                      Register value);
   void StoreIntoObjectNoBarrier(Register object,
                                 const Address& dest,
                                 const Object& value);
+  void StoreIntoObjectOffsetNoBarrier(Register object,
+                                      int32_t offset,
+                                      const Object& value);
 
   // Object pool, loading from pool, etc.
   void LoadPoolPointer(Register pp);
@@ -1152,7 +1196,7 @@
     const Register crt = ConcreteRegister(rt);
     const int32_t size = Log2OperandSizeBytes(sz);
     const int32_t encoding =
-        op | (size << kSzShift) |
+        op | ((size & 0x3) << kSzShift) |
         (static_cast<int32_t>(crt) << kRtShift) |
         a.encoding();
     Emit(encoding);