Adds single-precision and SIMD load/store to arm64.

runtime/vm/assembler_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 678 matching lines @@
     fldrd(dest, Address(base, offset, Address::Offset, kDWord));
   } else {
     ASSERT(base != TMP2);
     // Since offset is 32-bits, it won't be loaded from the pool.
     AddImmediate(TMP2, base, offset, kNoPP);
     fldrd(dest, Address(TMP2));
   }
 }
 
 
+void Assembler::LoadQFromOffset(VRegister dest, Register base, int32_t offset) {
+  if (Address::CanHoldOffset(offset, Address::Offset, kQWord)) {
+    fldrq(dest, Address(base, offset, Address::Offset, kQWord));
+  } else {
+    ASSERT(base != TMP2);
+    // Since offset is 32-bits, it won't be loaded from the pool.

[regis, 2014/05/08 17:10:05]

But if it was, PP would be used and it would be OK. So why is the decision taken
here by rather than in AddImmediate? Does it hurt to pass the default of PP?

[zra, 2014/05/08 18:55:07]

Changed to pass a PP or kNoPP so that lower level can decide. Here and
elsewhere.

+    AddImmediate(TMP2, base, offset, kNoPP);
+    fldrq(dest, Address(TMP2));
+  }
+}
+
+
 void Assembler::StoreToOffset(
     Register src, Register base, int32_t offset, OperandSize sz) {
   ASSERT(base != TMP2);
   if (Address::CanHoldOffset(offset, Address::Offset, sz)) {
     str(src, Address(base, offset, Address::Offset, sz), sz);
   } else {
     ASSERT(src != TMP2);
     // Since offset is 32-bits, it won't be loaded from the pool.
     AddImmediate(TMP2, base, offset, kNoPP);
     str(src, Address(TMP2), sz);
   }
 }
 
 
 void Assembler::StoreDToOffset(VRegister src, Register base, int32_t offset) {
   if (Address::CanHoldOffset(offset, Address::Offset, kDWord)) {
     fstrd(src, Address(base, offset, Address::Offset, kDWord));
   } else {
     ASSERT(base != TMP2);
     // Since offset is 32-bits, it won't be loaded from the pool.
     AddImmediate(TMP2, base, offset, kNoPP);
     fstrd(src, Address(TMP2));
   }
 }
 
 
+void Assembler::StoreQToOffset(VRegister src, Register base, int32_t offset) {
+  if (Address::CanHoldOffset(offset, Address::Offset, kQWord)) {
+    fstrq(src, Address(base, offset, Address::Offset, kQWord));
+  } else {
+    ASSERT(base != TMP2);
+    // Since offset is 32-bits, it won't be loaded from the pool.
+    AddImmediate(TMP2, base, offset, kNoPP);
+    fstrq(src, Address(TMP2));
+  }
+}
+
+
 // Store into object.
 // Preserves object and value registers.
 void Assembler::StoreIntoObjectFilterNoSmi(Register object,
                                            Register value,
                                            Label* no_update) {
   COMPILE_ASSERT((kNewObjectAlignmentOffset == kWordSize) &&
                  (kOldObjectAlignmentOffset == 0), young_alignment);
 
   // Write-barrier triggers if the value is in the new space (has bit set) and
   // the object is in the old space (has bit cleared).
@@ skipping 12 matching lines @@
   // For the value we are only interested in the new/old bit and the tag bit.
   // And the new bit with the tag bit. The resulting bit will be 0 for a Smi.
   and_(TMP, value, Operand(value, LSL, kObjectAlignmentLog2 - 1));
   // And the result with the negated space bit of the object.
   bic(TMP, TMP, Operand(object));
   tsti(TMP, kNewObjectAlignmentOffset);
   b(no_update, EQ);
 }
 
 
+void Assembler::StoreIntoObjectOffset(Register object,
+                                      int32_t offset,
+                                      Register value,
+                                      bool can_value_be_smi) {
+  if (Address::CanHoldOffset(offset - kHeapObjectTag)) {
+    StoreIntoObject(
+        object, FieldAddress(object, offset), value, can_value_be_smi);
+  } else {
+    AddImmediate(TMP, object, offset - kHeapObjectTag, PP);

[regis, 2014/05/08 17:10:05]

Why don't you pass kNoPP as above, since the offset is also 32-bit?

[zra, 2014/05/08 18:55:07]

Done.

+    StoreIntoObject(object, Address(TMP), value, can_value_be_smi);
+  }
+}
+
+
 void Assembler::StoreIntoObject(Register object,
                                 const Address& dest,
                                 Register value,
                                 bool can_value_be_smi) {
   ASSERT(object != value);
   str(value, dest);
   Label done;
   if (can_value_be_smi) {
     StoreIntoObjectFilter(object, value, &done);
   } else {
@@ skipping 25 matching lines @@
 #if defined(DEBUG)
   Label done;
   StoreIntoObjectFilter(object, value, &done);
   Stop("Store buffer update is required");
   Bind(&done);
 #endif  // defined(DEBUG)
   // No store buffer update.
 }
 
 
+void Assembler::StoreIntoObjectOffsetNoBarrier(Register object,
+                                               int32_t offset,
+                                               Register value) {
+  if (Address::CanHoldOffset(offset - kHeapObjectTag)) {
+    StoreIntoObjectNoBarrier(object, FieldAddress(object, offset), value);
+  } else {
+    AddImmediate(TMP, object, offset - kHeapObjectTag, PP);

[regis, 2014/05/08 17:10:05]

ditto

[zra, 2014/05/08 18:55:07]

Done.

+    StoreIntoObjectNoBarrier(object, Address(TMP), value);
+  }
+}
+
+
 void Assembler::StoreIntoObjectNoBarrier(Register object,
                                          const Address& dest,
                                          const Object& value) {
   ASSERT(value.IsSmi() || value.InVMHeap() ||
          (value.IsOld() && value.IsNotTemporaryScopedHandle()));
   // No store buffer update.
-  LoadObject(TMP, value, PP);
-  str(TMP, dest);
+  LoadObject(TMP2, value, PP);
+  str(TMP2, dest);
+}
+
+
+void Assembler::StoreIntoObjectOffsetNoBarrier(Register object,
+                                               int32_t offset,
+                                               const Object& value) {
+  if (Address::CanHoldOffset(offset - kHeapObjectTag)) {
+    StoreIntoObjectNoBarrier(object, FieldAddress(object, offset), value);
+  } else {
+    AddImmediate(TMP, object, offset - kHeapObjectTag, PP);

[regis, 2014/05/08 17:10:05]

ditto

[zra, 2014/05/08 18:55:07]

Done.

+    StoreIntoObjectNoBarrier(object, Address(TMP), value);
+  }
 }
 
 
 void Assembler::LoadClassId(Register result, Register object) {
   ASSERT(RawObject::kClassIdTagPos == 16);
   ASSERT(RawObject::kClassIdTagSize == 16);
   const intptr_t class_id_offset = Object::tags_offset() +
       RawObject::kClassIdTagPos / kBitsPerByte;
   LoadFromOffset(result, object, class_id_offset - kHeapObjectTag,
                  kUnsignedHalfword);
@@ skipping 333 matching lines @@
     LoadImmediate(TMP, tags, pp);
     StoreFieldToOffset(TMP, instance_reg, Object::tags_offset());
   } else {
     b(failure);
   }
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64