More coverage of load/stores in ARM integrated assembler.

More coverage of load/stores in ARM integrated assembler.

Adds many more cases of ldr{b,h}/str{b,h} instructions to the ARM
integerated assembler.

Also refactored decodeAddress() to deal with the fact that
immediate/register arguments for LDR/LDRB/STR/STRB differ for
LDRH/LDRD/STRH/STRD, by passing in the layout wanted.

Note: LDRD/STRD instructions are currently not used by Subzero.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=1956788f4459e0fedf91c10e8c266ca72a5d5fa1

[Karl, 2015-12-01 21:39:17]

Description was changed from

==========
More coverage of load/stores in ARM integrated assembler.

Adds many more cases of ldr{b,h}/str{b,h} instructions to the ARM
integerated assembler.

Also refactored decodeAddress() to deal with the fact that
immediate/register arguments for LDR/LDRB/STR/STRB differ for
LDRH/LDRD/STRH/STRD, by passing in the layout wanted.

Note: LDRD/STRD instructions are currently not used by Subzero.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
==========

to

==========
More coverage of load/stores in ARM integrated assembler.

Adds many more cases of ldr{b,h}/str{b,h} instructions to the ARM
integerated assembler.

Also refactored decodeAddress() to deal with the fact that
immediate/register arguments for LDR/LDRB/STR/STRB differ for
LDRH/LDRD/STRH/STRD, by passing in the layout wanted.

Note: LDRD/STRD instructions are currently not used by Subzero.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
==========

[Karl, 2015-12-01 21:39:17]

kschimpf@google.com changed reviewers:
+ jpp@chromium.org, sehr@chromium.org, stichnot@chromium.org

[Jim Stichnoth, 2015-12-01 22:45:34]

lgtm

https://codereview.chromium.org/1486263002/diff/20001/src/IceAssemblerARM32.cpp
File src/IceAssemblerARM32.cpp (right):

https://codereview.chromium.org/1486263002/diff/20001/src/IceAssemblerARM32.c...
src/IceAssemblerARM32.cpp:998: default:
Should "case 8" and "case 16" be explicitly called out, perhaps as an explicit
error?

[Karl, 2015-12-02 18:24:21]

Description was changed from

==========
More coverage of load/stores in ARM integrated assembler.

Adds many more cases of ldr{b,h}/str{b,h} instructions to the ARM
integerated assembler.

Also refactored decodeAddress() to deal with the fact that
immediate/register arguments for LDR/LDRB/STR/STRB differ for
LDRH/LDRD/STRH/STRD, by passing in the layout wanted.

Note: LDRD/STRD instructions are currently not used by Subzero.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
==========

to

==========
More coverage of load/stores in ARM integrated assembler.

Adds many more cases of ldr{b,h}/str{b,h} instructions to the ARM
integerated assembler.

Also refactored decodeAddress() to deal with the fact that
immediate/register arguments for LDR/LDRB/STR/STRB differ for
LDRH/LDRD/STRH/STRD, by passing in the layout wanted.

Note: LDRD/STRD instructions are currently not used by Subzero.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Committed:
https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a...
==========

[Karl, 2015-12-02 18:24:25]

Committed patchset #4 (id:60001) manually as
1956788f4459e0fedf91c10e8c266ca72a5d5fa1 (presubmit successful).

[Karl, 2015-12-02 18:24:44]

https://codereview.chromium.org/1486263002/diff/20001/src/IceAssemblerARM32.cpp
File src/IceAssemblerARM32.cpp (right):

https://codereview.chromium.org/1486263002/diff/20001/src/IceAssemblerARM32.c...
src/IceAssemblerARM32.cpp:998: default:
On 2015/12/01 22:45:33, stichnot wrote:
> Should "case 8" and "case 16" be explicitly called out, perhaps as an explicit
> error?

I'm not sure what you mean? 1 byte corresponds to i1/i8, 2 bytes to i16, and i64
(the largest int) is 8 bytes. How could there be a case 16?

I added comments to clarify what byte size corresponds to, and added "case 8" to
make it explicit that we don't handle i64's with a single load/store. Updated
method str similarly.

Ok. After re-reading this, I see what you are stating. for case "8" and "16" you
want an error instead of reverting back to a textual fixup. This is a general
issues that I need to clean up, and will look into in a future CL.