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Issue 1486263002: More coverage of load/stores in ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix remaining issue in patch set 2. Created 5 years ago
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1 ; More ldr/str examples (byte and half word).
2
3 ; REQUIRES: allow_dump
4
5 ; Compile using standalone assembler.
6 ; RUN: %lc2i --filetype=asm -i %s --target=arm32 --args -Om1 \
7 ; RUN: | FileCheck %s --check-prefix=ASM
8
9 ; Show bytes in assembled standalone code.
10 ; RUN: %lc2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
11 ; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS
12
13 ; Compile using integrated assembler.
14 ; RUN: %lc2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
15 ; RUN: | FileCheck %s --check-prefix=IASM
16
17 ; Show bytes in assembled integrated code.
18 ; RUN: %lc2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
19 ; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS
20
21
22 define internal i32 @LoadStoreI1(i32 %a, i32 %b) {
23 ; ASM-LABEL:LoadStoreI1:
24 ; DIS-LABEL:00000000 <LoadStoreI1>:
25 ; IASM-LABEL:LoadStoreI1:
26
27 entry:
28 ; ASM-NEXT:.LLoadStoreI1$entry:
29 ; IASM-NEXT:.LLoadStoreI1$entry:
30
31 ; ASM-NEXT: sub sp, sp, #32
32 ; DIS-NEXT: 0: e24dd020
33 ; IASM-NEXT: .byte 0x20
34 ; IASM-NEXT: .byte 0xd0
35 ; IASM-NEXT: .byte 0x4d
36 ; IASM-NEXT: .byte 0xe2
37
38 ; ASM-NEXT: str r0, [sp, #28]
39 ; ASM-NEXT: # [sp, #28] = def.pseudo
40 ; DIS-NEXT: 4: e58d001c
41 ; IASM-NEXT: .byte 0x1c
42 ; IASM-NEXT: .byte 0x0
43 ; IASM-NEXT: .byte 0x8d
44 ; IASM-NEXT: .byte 0xe5
45
46 ; ASM-NEXT: str r1, [sp, #24]
47 ; ASM-NEXT: # [sp, #24] = def.pseudo
48 ; DIS-NEXT: 8: e58d1018
49 ; IASM-NEXT: .byte 0x18
50 ; IASM-NEXT: .byte 0x10
51 ; IASM-NEXT: .byte 0x8d
52 ; IASM-NEXT: .byte 0xe5
53
54 %b.arg_trunc = trunc i32 %b to i1
55
56 ; ASM-NEXT: ldr r0, [sp, #24]
57 ; DIS-NEXT: c: e59d0018
58 ; IASM-NEXT: .byte 0x18
59 ; IASM-NEXT: .byte 0x0
60 ; IASM-NEXT: .byte 0x9d
61 ; IASM-NEXT: .byte 0xe5
62
63 ; ASM-NEXT: and r0, r0, #1
64 ; DIS-NEXT: 10: e2000001
65 ; IASM-NEXT: .byte 0x1
66 ; IASM-NEXT: .byte 0x0
67 ; IASM-NEXT: .byte 0x0
68 ; IASM-NEXT: .byte 0xe2
69
70 ; ASM-NEXT: strb r0, [sp, #20]
71 ; ASM-NEXT: # [sp, #20] = def.pseudo
72 ; DIS-NEXT: 14: e5cd0014
73 ; IASM-NEXT: .byte 0x14
74 ; IASM-NEXT: .byte 0x0
75 ; IASM-NEXT: .byte 0xcd
76 ; IASM-NEXT: .byte 0xe5
77
78 %a.arg_trunc = trunc i32 %a to i1
79 %conv = zext i1 %a.arg_trunc to i32
80
81 ; ASM-NEXT: ldr r0, [sp, #28]
82 ; DIS-NEXT: 18: e59d001c
83 ; IASM-NEXT: .byte 0x1c
84 ; IASM-NEXT: .byte 0x0
85 ; IASM-NEXT: .byte 0x9d
86 ; IASM-NEXT: .byte 0xe5
87
88 ; ASM-NEXT: and r0, r0, #1
89 ; DIS-NEXT: 1c: e2000001
90 ; IASM-NEXT: .byte 0x1
91 ; IASM-NEXT: .byte 0x0
92 ; IASM-NEXT: .byte 0x0
93 ; IASM-NEXT: .byte 0xe2
94
95 ; ASM-NEXT: strb r0, [sp, #16]
96 ; ASM-NEXT: # [sp, #16] = def.pseudo
97 ; DIS-NEXT: 20: e5cd0010
98 ; IASM-NEXT: .byte 0x10
99 ; IASM-NEXT: .byte 0x0
100 ; IASM-NEXT: .byte 0xcd
101 ; IASM-NEXT: .byte 0xe5
102
103 %add = sext i1 %b.arg_trunc to i32
104
105 ; ASM-NEXT: ldrb r0, [sp, #16]
106 ; DIS-NEXT: 24: e5dd0010
107 ; IASM-NEXT: .byte 0x10
108 ; IASM-NEXT: .byte 0x0
109 ; IASM-NEXT: .byte 0xdd
110 ; IASM-NEXT: .byte 0xe5
111
112 ; ASM-NEXT: str r0, [sp, #12]
113 ; ASM-NEXT: # [sp, #12] = def.pseudo
114 ; DIS-NEXT: 28: e58d000c
115 ; IASM-NEXT: .byte 0xc
116 ; IASM-NEXT: .byte 0x0
117 ; IASM-NEXT: .byte 0x8d
118 ; IASM-NEXT: .byte 0xe5
119
120 %tobool4 = icmp ne i32 %conv, %add
121
122 ; ASM-NEXT: mov r0, #0
123 ; DIS-NEXT: 2c: e3a00000
124 ; IASM-NEXT: .byte 0x0
125 ; IASM-NEXT: .byte 0x0
126 ; IASM-NEXT: .byte 0xa0
127 ; IASM-NEXT: .byte 0xe3
128
129 ; ASM-NEXT: ldrb r1, [sp, #20]
130 ; DIS-NEXT: 30: e5dd1014
131 ; IASM-NEXT: .byte 0x14
132 ; IASM-NEXT: .byte 0x10
133 ; IASM-NEXT: .byte 0xdd
134 ; IASM-NEXT: .byte 0xe5
135
136 ; ASM-NEXT: tst r1, #1
137 ; DIS-NEXT: 34: e3110001
138 ; IASM-NEXT: .byte 0x1
139 ; IASM-NEXT: .byte 0x0
140 ; IASM-NEXT: .byte 0x11
141 ; IASM-NEXT: .byte 0xe3
142
143 ; ASM-NEXT: mvn r1, #0
144 ; DIS-NEXT: 38: e3e01000
145 ; IASM-NEXT: .byte 0x0
146 ; IASM-NEXT: .byte 0x10
147 ; IASM-NEXT: .byte 0xe0
148 ; IASM-NEXT: .byte 0xe3
149
150 ; ASM-NEXT: movne r0, r1
151 ; DIS-NEXT: 3c: 11a00001
152 ; IASM-NEXT: .byte 0x1
153 ; IASM-NEXT: .byte 0x0
154 ; IASM-NEXT: .byte 0xa0
155 ; IASM-NEXT: .byte 0x11
156
157 ; ASM-NEXT: str r0, [sp, #8]
158 ; ASM-NEXT: # [sp, #8] = def.pseudo
159 ; DIS-NEXT: 40: e58d0008
160 ; IASM-NEXT: .byte 0x8
161 ; IASM-NEXT: .byte 0x0
162 ; IASM-NEXT: .byte 0x8d
163 ; IASM-NEXT: .byte 0xe5
164
165 %tobool4.ret_ext = zext i1 %tobool4 to i32
166
167 ; ASM-NEXT: mov r0, #0
168 ; DIS-NEXT: 44: e3a00000
169 ; IASM-NEXT: .byte 0x0
170 ; IASM-NEXT: .byte 0x0
171 ; IASM-NEXT: .byte 0xa0
172 ; IASM-NEXT: .byte 0xe3
173
174 ; ASM-NEXT: ldr r1, [sp, #12]
175 ; DIS-NEXT: 48: e59d100c
176 ; IASM-NEXT: .byte 0xc
177 ; IASM-NEXT: .byte 0x10
178 ; IASM-NEXT: .byte 0x9d
179 ; IASM-NEXT: .byte 0xe5
180
181 ; ASM-NEXT: ldr r2, [sp, #8]
182 ; DIS-NEXT: 4c: e59d2008
183 ; IASM-NEXT: .byte 0x8
184 ; IASM-NEXT: .byte 0x20
185 ; IASM-NEXT: .byte 0x9d
186 ; IASM-NEXT: .byte 0xe5
187
188 ; ASM-NEXT: cmp r1, r2
189 ; DIS-NEXT: 50: e1510002
190 ; IASM-NEXT: .byte 0x2
191 ; IASM-NEXT: .byte 0x0
192 ; IASM-NEXT: .byte 0x51
193 ; IASM-NEXT: .byte 0xe1
194
195 ; ASM-NEXT: movne r0, #1
196 ; DIS-NEXT: 54: 13a00001
197 ; IASM-NEXT: .byte 0x1
198 ; IASM-NEXT: .byte 0x0
199 ; IASM-NEXT: .byte 0xa0
200 ; IASM-NEXT: .byte 0x13
201
202 ; ASM-NEXT: strb r0, [sp, #4]
203 ; ASM-NEXT: # [sp, #4] = def.pseudo
204 ; DIS-NEXT: 58: e5cd0004
205 ; IASM-NEXT: .byte 0x4
206 ; IASM-NEXT: .byte 0x0
207 ; IASM-NEXT: .byte 0xcd
208 ; IASM-NEXT: .byte 0xe5
209
210 ret i32 %tobool4.ret_ext
211
212 ; ASM-NEXT: ldrb r0, [sp, #4]
213 ; DIS-NEXT: 5c: e5dd0004
214 ; IASM-NEXT: .byte 0x4
215 ; IASM-NEXT: .byte 0x0
216 ; IASM-NEXT: .byte 0xdd
217 ; IASM-NEXT: .byte 0xe5
218
219 ; ASM-NEXT: str r0, [sp]
220 ; ASM-NEXT: # [sp] = def.pseudo
221 ; DIS-NEXT: 60: e58d0000
222 ; IASM-NEXT: .byte 0x0
223 ; IASM-NEXT: .byte 0x0
224 ; IASM-NEXT: .byte 0x8d
225 ; IASM-NEXT: .byte 0xe5
226
227 ; ASM-NEXT: ldr r0, [sp]
228 ; DIS-NEXT: 64: e59d0000
229 ; IASM-NEXT: .byte 0x0
230 ; IASM-NEXT: .byte 0x0
231 ; IASM-NEXT: .byte 0x9d
232 ; IASM-NEXT: .byte 0xe5
233
234 ; ASM-NEXT: add sp, sp, #32
235 ; DIS-NEXT: 68: e28dd020
236 ; IASM-NEXT: .byte 0x20
237 ; IASM-NEXT: .byte 0xd0
238 ; IASM-NEXT: .byte 0x8d
239 ; IASM-NEXT: .byte 0xe2
240
241 ; ASM-NEXT: bx lr
242 ; DIS-NEXT: 6c: e12fff1e
243 ; IASM-NEXT: .byte 0x1e
244 ; IASM-NEXT: .byte 0xff
245 ; IASM-NEXT: .byte 0x2f
246 ; IASM-NEXT: .byte 0xe1
247 }
248
249
250 define internal i32 @LoadStoreI16(i32 %a, i32 %b) {
251 ; ASM-LABEL:LoadStoreI16:
252 ; DIS-LABEL:00000070 <LoadStoreI16>:
253 ; IASM-LABEL:LoadStoreI16:
254
255 entry:
256 ; ASM-NEXT:.LLoadStoreI16$entry:
257 ; IASM-NEXT:.LLoadStoreI16$entry:
258
259 ; ASM-NEXT: sub sp, sp, #36
260 ; DIS-NEXT: 70: e24dd024
261 ; IASM-NEXT: .byte 0x24
262 ; IASM-NEXT: .byte 0xd0
263 ; IASM-NEXT: .byte 0x4d
264 ; IASM-NEXT: .byte 0xe2
265
266 ; ASM-NEXT: str r0, [sp, #32]
267 ; ASM-NEXT: # [sp, #32] = def.pseudo
268 ; DIS-NEXT: 74: e58d0020
269 ; IASM-NEXT: .byte 0x20
270 ; IASM-NEXT: .byte 0x0
271 ; IASM-NEXT: .byte 0x8d
272 ; IASM-NEXT: .byte 0xe5
273
274 ; ASM-NEXT: str r1, [sp, #28]
275 ; ASM-NEXT: # [sp, #28] = def.pseudo
276 ; DIS-NEXT: 78: e58d101c
277 ; IASM-NEXT: .byte 0x1c
278 ; IASM-NEXT: .byte 0x10
279 ; IASM-NEXT: .byte 0x8d
280 ; IASM-NEXT: .byte 0xe5
281
282 %b.arg_trunc = trunc i32 %b to i16
283
284 ; ASM-NEXT: ldr r0, [sp, #28]
285 ; DIS-NEXT: 7c: e59d001c
286 ; IASM-NEXT: .byte 0x1c
287 ; IASM-NEXT: .byte 0x0
288 ; IASM-NEXT: .byte 0x9d
289 ; IASM-NEXT: .byte 0xe5
290
291 ; ASM-NEXT: strh r0, [sp, #24]
292 ; ASM-NEXT: # [sp, #24] = def.pseudo
293 ; DIS-NEXT: 80: e1cd01b8
294 ; IASM-NEXT: .byte 0xb8
295 ; IASM-NEXT: .byte 0x1
296 ; IASM-NEXT: .byte 0xcd
297 ; IASM-NEXT: .byte 0xe1
298
299 %a.arg_trunc = trunc i32 %a to i16
300
301 ; ASM-NEXT: ldr r0, [sp, #32]
302 ; DIS-NEXT: 84: e59d0020
303 ; IASM-NEXT: .byte 0x20
304 ; IASM-NEXT: .byte 0x0
305 ; IASM-NEXT: .byte 0x9d
306 ; IASM-NEXT: .byte 0xe5
307
308 ; ASM-NEXT: strh r0, [sp, #20]
309 ; ASM-NEXT: # [sp, #20] = def.pseudo
310 ; DIS-NEXT: 88: e1cd01b4
311 ; IASM-NEXT: .byte 0xb4
312 ; IASM-NEXT: .byte 0x1
313 ; IASM-NEXT: .byte 0xcd
314 ; IASM-NEXT: .byte 0xe1
315
316 %conv = zext i16 %a.arg_trunc to i32
317
318 ; ASM-NEXT: ldrh r0, [sp, #20]
319 ; DIS-NEXT: 8c: e1dd01b4
320 ; IASM-NEXT: .byte 0xb4
321 ; IASM-NEXT: .byte 0x1
322 ; IASM-NEXT: .byte 0xdd
323 ; IASM-NEXT: .byte 0xe1
324
325 ; ASM-NEXT: uxth r0, r0
326 ; DIS-NEXT: 90: e6ff0070
327 ; IASM-NEXT: .byte 0x70
328 ; IASM-NEXT: .byte 0x0
329 ; IASM-NEXT: .byte 0xff
330 ; IASM-NEXT: .byte 0xe6
331
332 ; ASM-NEXT: str r0, [sp, #16]
333 ; ASM-NEXT: # [sp, #16] = def.pseudo
334 ; DIS-NEXT: 94: e58d0010
335 ; IASM-NEXT: .byte 0x10
336 ; IASM-NEXT: .byte 0x0
337 ; IASM-NEXT: .byte 0x8d
338 ; IASM-NEXT: .byte 0xe5
339
340 %conv1 = zext i16 %b.arg_trunc to i32
341
342 ; ASM-NEXT: ldrh r0, [sp, #24]
343 ; DIS-NEXT: 98: e1dd01b8
344 ; IASM-NEXT: .byte 0xb8
345 ; IASM-NEXT: .byte 0x1
346 ; IASM-NEXT: .byte 0xdd
347 ; IASM-NEXT: .byte 0xe1
348
349 ; ASM-NEXT: uxth r0, r0
350 ; DIS-NEXT: 9c: e6ff0070
351 ; IASM-NEXT: .byte 0x70
352 ; IASM-NEXT: .byte 0x0
353 ; IASM-NEXT: .byte 0xff
354 ; IASM-NEXT: .byte 0xe6
355
356 ; ASM-NEXT: str r0, [sp, #12]
357 ; ASM-NEXT: # [sp, #12] = def.pseudo
358 ; DIS-NEXT: a0: e58d000c
359 ; IASM-NEXT: .byte 0xc
360 ; IASM-NEXT: .byte 0x0
361 ; IASM-NEXT: .byte 0x8d
362 ; IASM-NEXT: .byte 0xe5
363
364 %add = add i32 %conv1, %conv
365
366 ; ASM-NEXT: ldr r0, [sp, #12]
367 ; DIS-NEXT: a4: e59d000c
368 ; IASM-NEXT: .byte 0xc
369 ; IASM-NEXT: .byte 0x0
370 ; IASM-NEXT: .byte 0x9d
371 ; IASM-NEXT: .byte 0xe5
372
373 ; ASM-NEXT: ldr r1, [sp, #16]
374 ; DIS-NEXT: a8: e59d1010
375 ; IASM-NEXT: .byte 0x10
376 ; IASM-NEXT: .byte 0x10
377 ; IASM-NEXT: .byte 0x9d
378 ; IASM-NEXT: .byte 0xe5
379
380 ; ASM-NEXT: add r0, r0, r1
381 ; DIS-NEXT: ac: e0800001
382 ; IASM-NEXT: .byte 0x1
383 ; IASM-NEXT: .byte 0x0
384 ; IASM-NEXT: .byte 0x80
385 ; IASM-NEXT: .byte 0xe0
386
387 ; ASM-NEXT: str r0, [sp, #8]
388 ; ASM-NEXT: # [sp, #8] = def.pseudo
389 ; DIS-NEXT: b0: e58d0008
390 ; IASM-NEXT: .byte 0x8
391 ; IASM-NEXT: .byte 0x0
392 ; IASM-NEXT: .byte 0x8d
393 ; IASM-NEXT: .byte 0xe5
394
395 %conv2 = trunc i32 %add to i16
396
397 ; ASM-NEXT: ldr r0, [sp, #8]
398 ; DIS-NEXT: b4: e59d0008
399 ; IASM-NEXT: .byte 0x8
400 ; IASM-NEXT: .byte 0x0
401 ; IASM-NEXT: .byte 0x9d
402 ; IASM-NEXT: .byte 0xe5
403
404 ; ASM-NEXT: strh r0, [sp, #4]
405 ; ASM-NEXT: # [sp, #4] = def.pseudo
406 ; DIS-NEXT: b8: e1cd00b4
407 ; IASM-NEXT: .byte 0xb4
408 ; IASM-NEXT: .byte 0x0
409 ; IASM-NEXT: .byte 0xcd
410 ; IASM-NEXT: .byte 0xe1
411
412 %conv2.ret_ext = zext i16 %conv2 to i32
413
414 ; ASM-NEXT: ldrh r0, [sp, #4]
415 ; DIS-NEXT: bc: e1dd00b4
416 ; IASM-NEXT: .byte 0xb4
417 ; IASM-NEXT: .byte 0x0
418 ; IASM-NEXT: .byte 0xdd
419 ; IASM-NEXT: .byte 0xe1
420
421 ; ASM-NEXT: uxth r0, r0
422 ; DIS-NEXT: c0: e6ff0070
423 ; IASM-NEXT: .byte 0x70
424 ; IASM-NEXT: .byte 0x0
425 ; IASM-NEXT: .byte 0xff
426 ; IASM-NEXT: .byte 0xe6
427
428 ; ASM-NEXT: str r0, [sp]
429 ; ASM-NEXT: # [sp] = def.pseudo
430 ; DIS-NEXT: c4: e58d0000
431 ; IASM-NEXT: .byte 0x0
432 ; IASM-NEXT: .byte 0x0
433 ; IASM-NEXT: .byte 0x8d
434 ; IASM-NEXT: .byte 0xe5
435
436 ret i32 %conv2.ret_ext
437
438 ; ASM-NEXT: ldr r0, [sp]
439 ; DIS-NEXT: c8: e59d0000
440 ; IASM-NEXT: .byte 0x0
441 ; IASM-NEXT: .byte 0x0
442 ; IASM-NEXT: .byte 0x9d
443 ; IASM-NEXT: .byte 0xe5
444
445 ; ASM-NEXT: add sp, sp, #36
446 ; DIS-NEXT: cc: e28dd024
447 ; IASM-NEXT: .byte 0x24
448 ; IASM-NEXT: .byte 0xd0
449 ; IASM-NEXT: .byte 0x8d
450 ; IASM-NEXT: .byte 0xe2
451
452 ; ASM-NEXT: bx lr
453 ; DIS-NEXT: d0: e12fff1e
454 ; IASM-NEXT: .byte 0x1e
455 ; IASM-NEXT: .byte 0xff
456 ; IASM-NEXT: .byte 0x2f
457 ; IASM-NEXT: .byte 0xe1
458
459 }
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