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Re-assign registers on ARM so PP and CODE_REG are below R7 (FP on iOS).
Also update descriptions of register availability in instrinsics.
1) Mechanical replacement in *arm.* files except the simulator and constants_arm.h (with sed).
R5 -> R9
R6 -> R8
R8 -> R10
R9 -> R5
R10 -> R6
2) Change register aliases.
CTX = R10 -> CTX = R6
PP = R9 -> PP = R5
ICREG = R5 -> ICREG = R9
CODE_REG = R10 -> CODE_REG = R6
THR = R8 -> THR = R10
3) Fixup users of ldrd/strd to have valid register pairs.
bigint_lsh
bigint_absadd
bigint_abssub
bigint_sqradd
TYPED_ARRAY_ALLOCATION
InlineArrayAllocation
AllocateArrayStub
AllocateContextStub
4) Fix PushList in MegamorphicMissStub to keep runtime call arguments in the right order.
BUG=http://dartbug.com/24683
R=fschneider@google.com
Committed: https://github.com/dart-lang/sdk/commit/dd7250323d671248fa03c79bf0718fa100fd6e79
Total comments: 4
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runtime/vm/assembler_arm.cc
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runtime/vm/assembler_arm_test.cc
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runtime/vm/code_patcher_arm_test.cc
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runtime/vm/constants_arm.h
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runtime/vm/disassembler_arm.cc
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runtime/vm/flow_graph_compiler_arm.cc
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runtime/vm/instructions_arm.cc
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runtime/vm/intermediate_language_arm.cc
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runtime/vm/intrinsifier_arm.cc
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runtime/vm/intrinsifier_arm64.cc
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runtime/vm/intrinsifier_ia32.cc
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runtime/vm/intrinsifier_mips.cc
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runtime/vm/intrinsifier_x64.cc
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runtime/vm/runtime_entry_arm.cc
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runtime/vm/stub_code_arm.cc
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Total messages: 5 (1 generated)
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