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Issue
1405643003:
Subzero: Various fixes in preparation for x86-32 register aliasing. (Closed)
DescriptionSubzero: Various fixes in preparation for x86-32 register aliasing.
1. Helper function sameVarOrReg() also needs to return true if the two physical registers alias or overlap. Otherwise advanced phi lowering may pick an incorrect ordering.
2. With -asm-verbose, redundant truncation assignments expressed as _mov instructions, like "mov cl, ecx", need to have their register use counts updated properly, so that the LIVEEND= annotations are correct.
3. The register allocator should consider suitably typed aliases when choosing a register preference.
4. When evicting a variable, the register allocator should decrement the use count of all aliases.
5. When saving/restoring callee-save registers in the prolog/epilog, map each register to its "canonical" register (e.g. %bl --> %ebx) and make sure each canonical register is only considered once.
6. Remove some unnecessary Variable::setMustHaveReg() calls.
7. When assigning bool results as a constant 0 or 1, use an 8-bit constant instead of 32-bit so that only the 8-bit register gets assigned.
BUG= none
TEST= make check, plus spec2k -asm-verbose output is unchanged
R=kschimpf@google.com
Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=1fb030c668841de8f5393e2d2c9e2ad1296af3db
Patch Set 1 #Patch Set 2 : Revert the incorrect pextr change #
Total comments: 1
Patch Set 3 : Reformat, rebase #
Messages
Total messages: 4 (1 generated)
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