Subzero: Various fixes in preparation for x86-32 register aliasing.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 281 matching lines @@
     if (!I.isDeleted() && I.repointEdges(this, NewNode))
       Found = true;
   assert(Found);
   (void)Found;
   return NewNode;
 }
 
 namespace {
 
 // Helper function used by advancedPhiLowering().
-bool sameVarOrReg(const Variable *Var, const Operand *Opnd) {
-  if (Var == Opnd)
+bool sameVarOrReg(TargetLowering *Target, const Variable *Var1,
+                  const Operand *Opnd) {
+  if (Var1 == Opnd)
     return true;
-  if (const auto Var2 = llvm::dyn_cast<Variable>(Opnd)) {
-    if (Var->hasReg() && Var->getRegNum() == Var2->getRegNum())
-      return true;
-  }
-  return false;
+  const auto Var2 = llvm::dyn_cast<Variable>(Opnd);
+  if (Var2 == nullptr)
+    return false;
+
+  // If either operand lacks a register, they cannot be the same.
+  if (!Var1->hasReg())
+    return false;
+  if (!Var2->hasReg())
+    return false;
+
+  int32_t RegNum1 = Var1->getRegNum();
+  int32_t RegNum2 = Var2->getRegNum();
+  // Quick common-case check.
+  if (RegNum1 == RegNum2)
+    return true;
+
+  assert(Target->getAliasesForRegister(RegNum1)[RegNum2] ==
+         Target->getAliasesForRegister(RegNum2)[RegNum1]);
+  return Target->getAliasesForRegister(RegNum1)[RegNum2];
 }
 
 } // end of anonymous namespace
 
 // This the "advanced" version of Phi lowering for a basic block, in contrast
 // to the simple version that lowers through assignments involving temporaries.
 //
 // All Phi instructions in a basic block are conceptually executed in parallel.
 // However, if we lower Phis early and commit to a sequential ordering, we may
 // end up creating unnecessary interferences which lead to worse register
@@ skipping 56 matching lines @@
       // marking the phi dest variable as live on entry.
       SizeT VarNum = Func->getLiveness()->getLiveIndex(Dest->getIndex());
       assert(!Func->getLiveness()->getLiveIn(this)[VarNum]);
       Func->getLiveness()->getLiveIn(this)[VarNum] = true;
       Inst->setDeleted();
     }
   }
   if (NumPhis == 0)
     return;
 
+  TargetLowering *Target = Func->getTarget();
   SizeT InEdgeIndex = 0;
   for (CfgNode *Pred : InEdges) {
     CfgNode *Split = splitIncomingEdge(Pred, InEdgeIndex++);
     SizeT Remaining = NumPhis;
 
     // First pass computes Src and initializes NumPred.
     for (size_t I = 0; I < NumPhis; ++I) {
       Variable *Dest = Desc[I].Dest;
       Operand *Src = Desc[I].Phi->getOperandForTarget(Pred);
       Desc[I].Src = Src;
       Desc[I].Processed = false;
       Desc[I].NumPred = 0;
       // Cherry-pick any trivial assignments, so that they don't contribute to
       // the running complexity of the topological sort.
-      if (sameVarOrReg(Dest, Src)) {
+      if (sameVarOrReg(Target, Dest, Src)) {
         Desc[I].Processed = true;
         --Remaining;
         if (Dest != Src)
           // If Dest and Src are syntactically the same, don't bother adding
           // the assignment, because in all respects it would be redundant, and
           // if Dest/Src are on the stack, the target lowering may naively
           // decide to lower it using a temporary register.
           Split->appendInst(InstAssign::create(Func, Dest, Src));
       }
     }
     // Second pass computes NumPred by comparing every pair of Phi
     // instructions.
     for (size_t I = 0; I < NumPhis; ++I) {
       if (Desc[I].Processed)
         continue;
       const Variable *Dest = Desc[I].Dest;
       for (size_t J = 0; J < NumPhis; ++J) {
         if (Desc[J].Processed)
           continue;
         if (I != J) {
           // There shouldn't be two Phis with the same Dest variable or
           // register.
-          assert(!sameVarOrReg(Dest, Desc[J].Dest));
+          assert(!sameVarOrReg(Target, Dest, Desc[J].Dest));
         }
         const Operand *Src = Desc[J].Src;
-        if (sameVarOrReg(Dest, Src))
+        if (sameVarOrReg(Target, Dest, Src))
           ++Desc[I].NumPred;
       }
     }
 
     // Another pass to compute initial Weight values.
 
     // Always pick NumPred=0 over NumPred>0.
     constexpr int32_t WeightNoPreds = 4;
     // Prefer Src as a register because the register might free up.
     constexpr int32_t WeightSrcIsReg = 2;
@@ skipping 29 matching lines @@
         Weight = Desc[I].Weight;
         if (Weight > BestWeight) {
           BestIndex = I;
           BestWeight = Weight;
         }
       }
       assert(BestWeight >= 0);
       assert(Desc[BestIndex].NumPred <= 1);
       Variable *Dest = Desc[BestIndex].Dest;
       Operand *Src = Desc[BestIndex].Src;
-      assert(!sameVarOrReg(Dest, Src));
+      assert(!sameVarOrReg(Target, Dest, Src));
       // Break a cycle by introducing a temporary.
       if (Desc[BestIndex].NumPred) {
         bool Found = false;
         // If the target instruction "A=B" is part of a cycle, find the "X=A"
         // assignment in the cycle because it will have to be rewritten as
         // "X=tmp".
         for (size_t J = 0; !Found && J < NumPhis; ++J) {
           if (Desc[J].Processed)
             continue;
           Operand *OtherSrc = Desc[J].Src;
-          if (Desc[J].NumPred && sameVarOrReg(Dest, OtherSrc)) {
+          if (Desc[J].NumPred && sameVarOrReg(Target, Dest, OtherSrc)) {
             SizeT VarNum = Func->getNumVariables();
             Variable *Tmp = Func->makeVariable(OtherSrc->getType());
             if (BuildDefs::dump())
               Tmp->setName(Func, "__split_" + std::to_string(VarNum));
             Split->appendInst(InstAssign::create(Func, Tmp, OtherSrc));
             Desc[J].Src = Tmp;
             Found = true;
           }
         }
         assert(Found);
       }
       // Now that a cycle (if any) has been broken, create the actual
       // assignment.
       Split->appendInst(InstAssign::create(Func, Dest, Src));
       // Update NumPred for all Phi assignments using this Phi's Src as their
       // Dest variable. Also update Weight if NumPred dropped from 1 to 0.
       if (auto Var = llvm::dyn_cast<Variable>(Src)) {
         for (size_t I = 0; I < NumPhis; ++I) {
           if (Desc[I].Processed)
             continue;
-          if (sameVarOrReg(Var, Desc[I].Dest)) {
+          if (sameVarOrReg(Target, Var, Desc[I].Dest)) {
             if (--Desc[I].NumPred == 0)
               Desc[I].Weight += WeightNoPreds;
           }
         }
       }
       Desc[BestIndex].Processed = true;
     }
     Split->appendInst(InstBr::create(Func, this));
 
     Split->genCode();
@@ skipping 504 matching lines @@
     if (I.isRedundantAssign()) {
       // Usually, redundant assignments end the live range of the src variable
       // and begin the live range of the dest variable, with no net effect on
       // the liveness of their register. However, if the register allocator
       // infers the AllowOverlap condition, then this may be a redundant
       // assignment that does not end the src variable's live range, in which
       // case the active variable count for that register needs to be bumped.
       // That normally would have happened as part of emitLiveRangesEnded(),
       // but that isn't called for redundant assignments.
       Variable *Dest = I.getDest();
-      if (DecorateAsm && Dest->hasReg() && !I.isLastUse(I.getSrc(0)))
+      if (DecorateAsm && Dest->hasReg()) {
         ++LiveRegCount[Dest->getRegNum()];
+        if (I.isLastUse(I.getSrc(0)))
+          --LiveRegCount[llvm::cast<Variable>(I.getSrc(0))->getRegNum()];
+      }
       continue;
     }
     I.emit(Func);
     if (DecorateAsm)
       emitLiveRangesEnded(Str, Func, &I, LiveRegCount);
     Str << "\n";
     updateStats(Func, &I);
   }
   if (DecorateAsm) {
     constexpr bool IsLiveIn = false;
@@ skipping 328 matching lines @@
   InstIntrinsicCall *Inst = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Inst->addArg(AtomicRMWOp);
   Inst->addArg(Counter);
   Inst->addArg(One);
   Inst->addArg(OrderAcquireRelease);
   Insts.push_front(Inst);
 }
 
 } // end of namespace Ice