Use R0/R1 instead of R4/R5 for ARM eh_return return values

Use R0/R1 instead of R4/R5 for ARM eh_return return values

Returning things in callee-save registers can clobber live variables in
functions with catch blocks. I'm not 100% sure how this ever worked.

The side effect of this means I had to fix the return behavior of functions
which return via eh_return so that they save and restore R0/R1 in addition
to the callee-save registers. This is all part of our ARM dwarf EH localmod,
but doing this same thing on x86 should fix PR8541.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4171
R=jvoung@chromium.org

Committed: https://chromium.googlesource.com/native_client/pnacl-llvm/+/43d482ad1c96633d1bfb5ed7d1e50c97928ea8fa

[jvoung (off chromium), 2015-06-03 17:19:38]

otherwise LGTM

were you thinking of adding a .ll test, e.g., that checks the push r0,r1 and
pops sometimes r0,r1?

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMBaseRegis...
File lib/Target/ARM/ARMBaseRegisterInfo.cpp (right):

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMBaseRegis...
lib/Target/ARM/ARMBaseRegisterInfo.cpp:67: // @LOCALMOD-START
Leave a note that we aren't supporting the other CallingConvs?

Otherwise, this could be returned after the CallingConv checks like Darwin's
RegList.

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMCallingCo...
File lib/Target/ARM/ARMCallingConv.td (right):

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMCallingCo...
lib/Target/ARM/ARMCallingConv.td:245: def CSR_NaCl_EHRet : CalleeSavedRegs<(add
LR, R11, R10, R8, R7, R6, R5, R4, R1, R0,
Is it possible to express this as (add CSR_NaCl, R1, R0)? Not completely sure of
the syntax...

Separate cleanup: CSR_NaCl is almost (sub CSR_AAPCS, R9)? It doesn't need the
order to be shuffled like iOS.

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMFrameLowe...
File lib/Target/ARM/ARMFrameLowering.cpp (right):

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMFrameLowe...
lib/Target/ARM/ARMFrameLowering.cpp:1082: // insertion code places the stack
pointer restore before the CSR restores;
80 col

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMFrameLowe...
lib/Target/ARM/ARMFrameLowering.cpp:1098: .addReg(ARM::SP));
revert whitespace change?

[Derek Schuff, 2015-06-03 20:50:57]

also added test.

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMBaseRegis...
File lib/Target/ARM/ARMBaseRegisterInfo.cpp (right):

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMBaseRegis...
lib/Target/ARM/ARMBaseRegisterInfo.cpp:67: // @LOCALMOD-START
On 2015/06/03 17:19:38, jvoung wrote:
> Leave a note that we aren't supporting the other CallingConvs?
> 
> Otherwise, this could be returned after the CallingConv checks like Darwin's
> RegList.

Done.

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMCallingCo...
File lib/Target/ARM/ARMCallingConv.td (right):

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMCallingCo...
lib/Target/ARM/ARMCallingConv.td:245: def CSR_NaCl_EHRet : CalleeSavedRegs<(add
LR, R11, R10, R8, R7, R6, R5, R4, R1, R0,
On 2015/06/03 17:19:38, jvoung wrote:
> Is it possible to express this as (add CSR_NaCl, R1, R0)? Not completely sure
of
> the syntax...

Yes, that works.

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMFrameLowe...
File lib/Target/ARM/ARMFrameLowering.cpp (right):

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMFrameLowe...
lib/Target/ARM/ARMFrameLowering.cpp:1082: // insertion code places the stack
pointer restore before the CSR restores;
On 2015/06/03 17:19:38, jvoung wrote:
> 80 col

Done.

https://codereview.chromium.org/1154253004/diff/1/lib/Target/ARM/ARMFrameLowe...
lib/Target/ARM/ARMFrameLowering.cpp:1098: .addReg(ARM::SP));
On 2015/06/03 17:19:38, jvoung wrote:
> revert whitespace change?

Done.

[Derek Schuff, 2015-06-03 20:57:00]

Committed patchset #2 (id:20001) manually as
43d482ad1c96633d1bfb5ed7d1e50c97928ea8fa.