Use R0/R1 instead of R4/R5 for ARM eh_return return values

lib/Target/ARM/ARMISelLowering.cpp

 //===-- ARMISelLowering.cpp - ARM DAG Lowering Implementation -------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines the interfaces that ARM uses to lower LLVM code into a
@@ skipping 747 matching lines @@
   setOperationAction(ISD::VASTART,            MVT::Other, Custom);
   setOperationAction(ISD::VAARG,              MVT::Other, Expand);
   setOperationAction(ISD::VACOPY,             MVT::Other, Expand);
   setOperationAction(ISD::VAEND,              MVT::Other, Expand);
   setOperationAction(ISD::STACKSAVE,          MVT::Other, Expand);
   setOperationAction(ISD::STACKRESTORE,       MVT::Other, Expand);
 
   if (!Subtarget->isTargetMachO()) {
     // Non-MachO platforms may return values in these registers via the
     // personality function.
-    // @LOCALMOD-START
-    if (Subtarget->isTargetNaCl()) {
-      // we use the first caller saved regs here
-      // c.f.: llvm-gcc/llvm-gcc-4.2/gcc/unwind-dw2.c::uw_install_context
-      // NOTE: these are related to the _Unwind_PNaClSetResult{0,1} functions
-      setExceptionPointerRegister(ARM::R4);
-      setExceptionSelectorRegister(ARM::R5);
-  
-      setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i32, Custom);
+    setExceptionPointerRegister(ARM::R0);
+    setExceptionSelectorRegister(ARM::R1);
+  }
 
-      setOperationAction(ISD::EH_RETURN, MVT::Other, Custom);
-    } else {
-      setExceptionPointerRegister(ARM::R0);
-      setExceptionSelectorRegister(ARM::R1);
-    }
-    // @LOCALMOD-END
+  // @LOCALMOD-START
+  if (Subtarget->isTargetNaCl()) {
+    setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i32, Custom);
+    setOperationAction(ISD::EH_RETURN, MVT::Other, Custom);
   }
+  // @LOCALMOD-END
 
   if (Subtarget->getTargetTriple().isWindowsItaniumEnvironment())
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
   else
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
 
   // ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use
   // the default expansion. If we are targeting a single threaded system,
   // then set them all for expand so we can lower them later into their
   // non-atomic form.
@@ skipping 10699 matching lines @@
     return false;
 
   HABaseType Base = HA_UNKNOWN;
   uint64_t Members = 0;
   bool IsHA = isHomogeneousAggregate(Ty, Base, Members);
   DEBUG(dbgs() << "isHA: " << IsHA << " "; Ty->dump());
 
   bool IsIntArray = Ty->isArrayTy() && Ty->getArrayElementType()->isIntegerTy();
   return IsHA || IsIntArray;
 }