Use R0/R1 instead of R4/R5 for ARM eh_return return values

test/CodeGen/ARM/ehreturn.ll

Index: test/CodeGen/ARM/ehreturn.ll
diff --git a/test/CodeGen/ARM/ehreturn.ll b/test/CodeGen/ARM/ehreturn.ll
new file mode 100644
index 0000000000000000000000000000000000000000..9ed819a8caf090fcd719c08ba5601d56df9ad7f1
--- /dev/null
+++ b/test/CodeGen/ARM/ehreturn.ll
@@ -0,0 +1,25 @@
+; RUN: llc -O0 < %s | FileCheck %s
+target datalayout = "e-p:32:32-i64:64-n32"
+target triple = "armv7-unknown-nacl-gnueabihf"
+
+declare void @llvm.eh.return.i32(i32, i8*) nounwind
+declare void @llvm.eh.unwind.init() nounwind
+
+; CHECK-LABEL: @raise_exception
+; CHECK: push {r0, r1, r4, r5, r6, r7, r8, r10, r11, lr}
+define i32 @raise_exception(i32 %b) {
+entry:
+  tail call void @llvm.eh.unwind.init()
+  %a = add i32 %b, 3
+  %cmp = icmp slt i32 %a, 0
+  br i1 %cmp, label %normal_ret, label %eh_ret
+normal_ret:
+; CHECK: ldm sp!, {r12}
+; CHECK: ldm sp!, {r12}
+; CHECK: pop {r4, r5, r6, r7, r8, r10, r11, lr}
+  ret i32 %a
+eh_ret:
+; CHECK: pop {r0, r1, r4, r5, r6, r7, r8, r10, r11, lr}
+  tail call void @llvm.eh.return.i32(i32 %a, i8* null)
+  unreachable
+}