Add movw and movt support for ARMv7. This includes some code from...

Add movw and movt support for ARMv7.  This includes some code from
Zhang Kun.  For now we only emit movw and movt in places where no
relocation is needed.  Small performance boost (around 0.5%).
Also adds support for turning ALU operations (eor etc.) with
large immediates into mvn or movw followed by a register-based
ALU operation.

Committed: http://code.google.com/p/v8/source/detail?r=4913

[Søren Thygesen Gjesse, 2010-06-21 21:39:26]

LGTM

http://codereview.chromium.org/2821014/diff/1/3
File src/arm/assembler-arm.h (right):

http://codereview.chromium.org/2821014/diff/1/3#newcode784
src/arm/assembler-arm.h:784: // Movw is just mov with the relevant immediate.
We don't need movw which just asserts a 16-bit immediate and calls mov, to
ensure only one instruction is generated?

http://codereview.chromium.org/2821014/diff/1/5
File src/arm/disasm-arm.cc (right):

http://codereview.chromium.org/2821014/diff/1/5#newcode386
src/arm/disasm-arm.cc:386: out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ +
out_buffer_pos_,
According to the ARM reference manual the assembler syntax is

  MOVT<c><q> <Rd>, #<imm16>

(without the trailing 0's)

http://codereview.chromium.org/2821014/diff/1/7
File src/jsregexp.cc (right):

http://codereview.chromium.org/2821014/diff/1/7#newcode1750
src/jsregexp.cc:1750: // For 2-character preloads in ASCII mode we also use a 16
bit load with
This comment should maybe cover both the ASCII and two byte condition.

http://codereview.chromium.org/2821014/diff/1/8
File test/cctest/test-disasm-arm.cc (right):

http://codereview.chromium.org/2821014/diff/1/8#newcode293
test/cctest/test-disasm-arm.cc:293: 
Missing movt test?