Add 1.2GHz cpu clock support for T25

arch/arm/mach-tegra/tegra2_clocks.c

Index: arch/arm/mach-tegra/tegra2_clocks.c
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 1622de8bd06510aa37a750234f287f1f4a71bdda..fe0e11f0d74793f2446e0f7eeb20191635c8ef71 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -789,6 +789,7 @@ static int tegra2_pll_div_clk_set_rate(struct clk *c, unsigned long rate)
 	unsigned long parent_rate = clk_get_rate(c->parent);
 
 	pr_debug("%s: %s %lu\n", __func__, c->name, rate);
+

[Olof Johansson, 2011/01/12 01:05:28]

Unrelated change, please discard

[jimmzhang, 2011/01/12 01:22:56]

will be removed.

 	if (c->flags & DIV_U71) {
 		divider_u71 = clk_div71_get_divider(parent_rate, rate);
 		if (divider_u71 >= 0) {
@@ -1513,6 +1514,12 @@ static struct clk tegra_pll_u = {
 };
 
 static struct clk_pll_freq_table tegra_pll_x_freq_table[] = {
+	/* 1.2 GHz */
+	{ 12000000, 1200000000,  600,  6, 1, 12},
+	{ 13000000, 1200000000,  923, 10, 1, 12},
+	{ 19200000, 1200000000,  750, 12, 1,  8},
+	{ 26000000, 1200000000,  600, 13, 1, 12},
+
 	/* 1 GHz */
 	{ 12000000, 1000000000, 1000, 12, 1, 12},
 	{ 13000000, 1000000000, 1000, 13, 1, 12},
@@ -1564,7 +1571,7 @@ static struct clk tegra_pll_x = {
 	.ops       = &tegra_pllx_ops,
 	.reg       = 0xe0,
 	.parent    = &tegra_clk_m,
-	.max_rate  = 1000000000,
+	.max_rate  = 1200000000,

[Olof Johansson, 2011/01/12 01:05:28]

Is it safe to set max_rate here? Shouldn't you update it dynamically when you
detect T25 instead? (same for the other changes below).

[jimmzhang, 2011/01/12 01:22:56]

The max value is still limited by the cpu frequency table. In case of T20, the
max rate will only be set to 1.0GHz.

[Olof Johansson, 2011/01/12 18:53:07]

Ok, sounds good.

 	.u.pll = {
 		.input_min = 2000000,
 		.input_max = 31000000,
@@ -1713,7 +1720,7 @@ static struct clk tegra_clk_cclk = {
 	.inputs	= mux_cclk,
 	.reg	= 0x20,
 	.ops	= &tegra_super_ops,
-	.max_rate = 1000000000,
+	.max_rate = 1200000000,
 };
 
 static struct clk tegra_clk_sclk = {
@@ -1731,7 +1738,7 @@ static struct clk tegra_clk_virtual_cpu = {
 	.name      = "cpu",
 	.parent    = &tegra_clk_cclk,
 	.ops       = &tegra_cpu_ops,
-	.max_rate  = 1000000000,
+	.max_rate  = 1200000000,
 	.u.cpu = {
 		.main      = &tegra_pll_x,
 		.backup    = &tegra_pll_p,