| Index: src/arm/cpu-arm.cc
|
| diff --git a/src/arm/cpu-arm.cc b/src/arm/cpu-arm.cc
|
| index cf531e1292bd8e4e7c1fa2e3e551b5167354a78f..20c6a5dcce31e4e002afa0882bc62467baaf82a9 100644
|
| --- a/src/arm/cpu-arm.cc
|
| +++ b/src/arm/cpu-arm.cc
|
| @@ -27,8 +27,13 @@
|
|
|
| // CPU specific code for arm independent of OS goes here.
|
| #ifdef __arm__
|
| +#ifdef __QNXNTO__
|
| +#include <sys/mman.h> // for cache flushing.
|
| +#undef MAP_TYPE
|
| +#else
|
| #include <sys/syscall.h> // for cache flushing.
|
| #endif
|
| +#endif
|
|
|
| #include "v8.h"
|
|
|
| @@ -57,13 +62,15 @@ void CPU::FlushICache(void* start, size_t size) {
|
| return;
|
| }
|
|
|
| -#if defined (USE_SIMULATOR)
|
| +#if defined(USE_SIMULATOR)
|
| // Not generating ARM instructions for C-code. This means that we are
|
| // building an ARM emulator based target. We should notify the simulator
|
| // that the Icache was flushed.
|
| // None of this code ends up in the snapshot so there are no issues
|
| // around whether or not to generate the code when building snapshots.
|
| Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
|
| +#elif V8_OS_QNX
|
| + msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
|
| #else
|
| // Ideally, we would call
|
| // syscall(__ARM_NR_cacheflush, start,
|
|
|