Add support for the QNX operating system.

src/atomicops_internals_arm_gcc.h

Index: src/atomicops_internals_arm_gcc.h
diff --git a/src/atomicops_internals_arm_gcc.h b/src/atomicops_internals_arm_gcc.h
index 6c30256d93dea601b5d3592250c303dbae0dadeb..d0c0e557cdbc1e45e65ab24f9cbb17b5db0d240f 100644
--- a/src/atomicops_internals_arm_gcc.h
+++ b/src/atomicops_internals_arm_gcc.h
@@ -32,9 +32,52 @@
 #ifndef V8_ATOMICOPS_INTERNALS_ARM_GCC_H_
 #define V8_ATOMICOPS_INTERNALS_ARM_GCC_H_
 
+#if V8_OS_QNX

[Benedikt Meurer, 2013/11/15 11:49:59]

The atomicops_*.h files were copied from Chromium's base/atomicops_*.h. If
possible we'd like to avoid adding our own changes here. Do you plan on porting
Chromium to QNX as well?

[c.truta, 2013/11/18 13:36:32]

Yes. We can keep this change for now in our private branches, until we land it
in Chromium, and then resubmit here, if you prefer.

[Benedikt Meurer, 2013/11/19 07:01:27]

That's great! I think we'll just sync all atomicops_* files again, once your
changes have landed.

+#include <arm/cpuinline.h>
+#include <arm/smpxchg.h>
+#endif
+
 namespace v8 {
 namespace internal {
 
+#if V8_OS_QNX
+inline void MemoryBarrier() {
+  __cpu_membarrier();
+}
+
+inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
+                                         Atomic32 old_value,
+                                         Atomic32 new_value) {
+  return _smp_cmpxchg(reinterpret_cast<volatile unsigned*>(ptr),
+                      old_value, new_value);
+}
+
+inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
+                                         Atomic32 new_value) {
+  return _smp_xchg(reinterpret_cast<volatile unsigned*>(ptr), new_value);
+}
+
+inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
+                                          Atomic32 increment) {
+  return Barrier_AtomicIncrement(ptr, increment);
+}
+
+inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
+                                        Atomic32 increment) {
+  for (;;) {
+    // Atomic exchange the old value with an incremented one.
+    Atomic32 old_value = *ptr;
+    Atomic32 new_value = old_value + increment;
+    if (_smp_cmpxchg(reinterpret_cast<volatile unsigned*>(ptr),
+                     old_value, new_value) ==
+        static_cast<unsigned>(old_value)) {
+      // The exchange took place as expected.
+      return new_value;
+    }
+    // Otherwise, *ptr changed mid-loop and we need to retry.
+  }
+}
+#else
 // 0xffff0fc0 is the hard coded address of a function provided by
 // the kernel which implements an atomic compare-exchange. On older
 // ARM architecture revisions (pre-v6) this may be implemented using
@@ -50,6 +93,9 @@ typedef void (*LinuxKernelMemoryBarrierFunc)(void);
 LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier __attribute__((weak)) =
     (LinuxKernelMemoryBarrierFunc) 0xffff0fa0;
 
+inline void MemoryBarrier() {
+  pLinuxKernelMemoryBarrier();
+}
 
 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
                                          Atomic32 old_value,
@@ -94,6 +140,7 @@ inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
     // Otherwise, *ptr changed mid-loop and we need to retry.
   }
 }
+#endif  // V8_OS_QNX
 
 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
                                        Atomic32 old_value,
@@ -111,10 +158,6 @@ inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
 }
 
-inline void MemoryBarrier() {
-  pLinuxKernelMemoryBarrier();
-}
-
 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
   MemoryBarrier();