Add support for the QNX operating system.

src/arm/cpu-arm.cc

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 // CPU specific code for arm independent of OS goes here.
 #ifdef __arm__
+#ifdef __QNXNTO__
+#include <sys/mman.h>  // for cache flushing.
+#undef MAP_TYPE
+#else
 #include <sys/syscall.h>  // for cache flushing.
 #endif
+#endif
 
 #include "v8.h"
 
 #if V8_TARGET_ARCH_ARM
 
 #include "cpu.h"
 #include "macro-assembler.h"
 #include "simulator.h"  // for cache flushing.
 
 namespace v8 {
 namespace internal {
 
 void CPU::SetUp() {
   CpuFeatures::Probe();
 }
 
 
 bool CPU::SupportsCrankshaft() {
   return CpuFeatures::IsSupported(VFP3);
 }
 
 
 void CPU::FlushICache(void* start, size_t size) {
   // Nothing to do flushing no instructions.
   if (size == 0) {
     return;
   }
 
-#if defined (USE_SIMULATOR)
+#if defined(USE_SIMULATOR)
   // Not generating ARM instructions for C-code. This means that we are
   // building an ARM emulator based target.  We should notify the simulator
   // that the Icache was flushed.
   // None of this code ends up in the snapshot so there are no issues
   // around whether or not to generate the code when building snapshots.
   Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
+#elif V8_OS_QNX
+  msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
 #else
   // Ideally, we would call
   //   syscall(__ARM_NR_cacheflush, start,
   //           reinterpret_cast<intptr_t>(start) + size, 0);
   // however, syscall(int, ...) is not supported on all platforms, especially
   // not when using EABI, so we call the __ARM_NR_cacheflush syscall directly.
 
   register uint32_t beg asm("a1") = reinterpret_cast<uint32_t>(start);
   register uint32_t end asm("a2") =
       reinterpret_cast<uint32_t>(start) + size;
@@ skipping 25 matching lines @@
         : "=r" (beg)
         : "0" (beg), "r" (end), "r" (flg), "r" (__ARM_NR_cacheflush)
         : "r3");
   #endif
 #endif
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM