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Side by Side Diff: src/x64/assembler-x64.h

Issue 426233002: Land the Fan (disabled) (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Review feedback, rebase and "git cl format" Created 6 years, 4 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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430 430
431 // Adds operand displacement fields (offsets added to the memory address). 431 // Adds operand displacement fields (offsets added to the memory address).
432 // Needs to be called after set_sib, not before it. 432 // Needs to be called after set_sib, not before it.
433 inline void set_disp8(int disp); 433 inline void set_disp8(int disp);
434 inline void set_disp32(int disp); 434 inline void set_disp32(int disp);
435 435
436 friend class Assembler; 436 friend class Assembler;
437 }; 437 };
438 438
439 439
440 #define ASSEMBLER_INSTRUCTION_LIST(V) \ 440 #define ASSEMBLER_INSTRUCTION_LIST(V) \
441 V(add) \ 441 V(add) \
442 V(and) \ 442 V(and) \
443 V(cmp) \ 443 V(cmp) \
444 V(dec) \ 444 V(dec) \
445 V(idiv) \ 445 V(idiv) \
446 V(imul) \ 446 V(div) \
447 V(inc) \ 447 V(imul) \
448 V(lea) \ 448 V(inc) \
449 V(mov) \ 449 V(lea) \
450 V(movzxb) \ 450 V(mov) \
451 V(movzxw) \ 451 V(movzxb) \
452 V(neg) \ 452 V(movzxw) \
453 V(not) \ 453 V(neg) \
454 V(or) \ 454 V(not) \
455 V(repmovs) \ 455 V(or) \
456 V(sbb) \ 456 V(repmovs) \
457 V(sub) \ 457 V(sbb) \
458 V(test) \ 458 V(sub) \
459 V(xchg) \ 459 V(test) \
460 V(xchg) \
460 V(xor) 461 V(xor)
461 462
462 463
463 // Shift instructions on operands/registers with kPointerSize, kInt32Size and 464 // Shift instructions on operands/registers with kPointerSize, kInt32Size and
464 // kInt64Size. 465 // kInt64Size.
465 #define SHIFT_INSTRUCTION_LIST(V) \ 466 #define SHIFT_INSTRUCTION_LIST(V) \
466 V(rol, 0x0) \ 467 V(rol, 0x0) \
467 V(ror, 0x1) \ 468 V(ror, 0x1) \
468 V(rcl, 0x2) \ 469 V(rcl, 0x2) \
469 V(rcr, 0x3) \ 470 V(rcr, 0x3) \
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1428 immediate_arithmetic_op(0x7, dst, src, size); 1429 immediate_arithmetic_op(0x7, dst, src, size);
1429 } 1430 }
1430 1431
1431 void emit_dec(Register dst, int size); 1432 void emit_dec(Register dst, int size);
1432 void emit_dec(const Operand& dst, int size); 1433 void emit_dec(const Operand& dst, int size);
1433 1434
1434 // Divide rdx:rax by src. Quotient in rax, remainder in rdx when size is 64. 1435 // Divide rdx:rax by src. Quotient in rax, remainder in rdx when size is 64.
1435 // Divide edx:eax by lower 32 bits of src. Quotient in eax, remainder in edx 1436 // Divide edx:eax by lower 32 bits of src. Quotient in eax, remainder in edx
1436 // when size is 32. 1437 // when size is 32.
1437 void emit_idiv(Register src, int size); 1438 void emit_idiv(Register src, int size);
1439 void emit_div(Register src, int size);
1438 1440
1439 // Signed multiply instructions. 1441 // Signed multiply instructions.
1440 // rdx:rax = rax * src when size is 64 or edx:eax = eax * src when size is 32. 1442 // rdx:rax = rax * src when size is 64 or edx:eax = eax * src when size is 32.
1441 void emit_imul(Register src, int size); 1443 void emit_imul(Register src, int size);
1442 void emit_imul(Register dst, Register src, int size); 1444 void emit_imul(Register dst, Register src, int size);
1443 void emit_imul(Register dst, const Operand& src, int size); 1445 void emit_imul(Register dst, const Operand& src, int size);
1444 void emit_imul(Register dst, Register src, Immediate imm, int size); 1446 void emit_imul(Register dst, Register src, Immediate imm, int size);
1445 1447
1446 void emit_inc(Register dst, int size); 1448 void emit_inc(Register dst, int size);
1447 void emit_inc(const Operand& dst, int size); 1449 void emit_inc(const Operand& dst, int size);
1448 1450
1449 void emit_lea(Register dst, const Operand& src, int size); 1451 void emit_lea(Register dst, const Operand& src, int size);
1450 1452
1451 void emit_mov(Register dst, const Operand& src, int size); 1453 void emit_mov(Register dst, const Operand& src, int size);
1452 void emit_mov(Register dst, Register src, int size); 1454 void emit_mov(Register dst, Register src, int size);
1453 void emit_mov(const Operand& dst, Register src, int size); 1455 void emit_mov(const Operand& dst, Register src, int size);
1454 void emit_mov(Register dst, Immediate value, int size); 1456 void emit_mov(Register dst, Immediate value, int size);
1455 void emit_mov(const Operand& dst, Immediate value, int size); 1457 void emit_mov(const Operand& dst, Immediate value, int size);
1456 1458
1457 void emit_movzxb(Register dst, const Operand& src, int size); 1459 void emit_movzxb(Register dst, const Operand& src, int size);
1460 void emit_movzxb(Register dst, Register src, int size);
1458 void emit_movzxw(Register dst, const Operand& src, int size); 1461 void emit_movzxw(Register dst, const Operand& src, int size);
1459 void emit_movzxw(Register dst, Register src, int size); 1462 void emit_movzxw(Register dst, Register src, int size);
1460 1463
1461 void emit_neg(Register dst, int size); 1464 void emit_neg(Register dst, int size);
1462 void emit_neg(const Operand& dst, int size); 1465 void emit_neg(const Operand& dst, int size);
1463 1466
1464 void emit_not(Register dst, int size); 1467 void emit_not(Register dst, int size);
1465 void emit_not(const Operand& dst, int size); 1468 void emit_not(const Operand& dst, int size);
1466 1469
1467 void emit_or(Register dst, Register src, int size) { 1470 void emit_or(Register dst, Register src, int size) {
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1507 } 1510 }
1508 1511
1509 void emit_sub(const Operand& dst, Immediate src, int size) { 1512 void emit_sub(const Operand& dst, Immediate src, int size) {
1510 immediate_arithmetic_op(0x5, dst, src, size); 1513 immediate_arithmetic_op(0x5, dst, src, size);
1511 } 1514 }
1512 1515
1513 void emit_test(Register dst, Register src, int size); 1516 void emit_test(Register dst, Register src, int size);
1514 void emit_test(Register reg, Immediate mask, int size); 1517 void emit_test(Register reg, Immediate mask, int size);
1515 void emit_test(const Operand& op, Register reg, int size); 1518 void emit_test(const Operand& op, Register reg, int size);
1516 void emit_test(const Operand& op, Immediate mask, int size); 1519 void emit_test(const Operand& op, Immediate mask, int size);
1520 void emit_test(Register reg, const Operand& op, int size) {
1521 return emit_test(op, reg, size);
1522 }
1517 1523
1518 // Exchange two registers
1519 void emit_xchg(Register dst, Register src, int size); 1524 void emit_xchg(Register dst, Register src, int size);
1525 void emit_xchg(Register dst, const Operand& src, int size);
1520 1526
1521 void emit_xor(Register dst, Register src, int size) { 1527 void emit_xor(Register dst, Register src, int size) {
1522 if (size == kInt64Size && dst.code() == src.code()) { 1528 if (size == kInt64Size && dst.code() == src.code()) {
1523 // 32 bit operations zero the top 32 bits of 64 bit registers. Therefore 1529 // 32 bit operations zero the top 32 bits of 64 bit registers. Therefore
1524 // there is no need to make this a 64 bit operation. 1530 // there is no need to make this a 64 bit operation.
1525 arithmetic_op(0x33, dst, src, kInt32Size); 1531 arithmetic_op(0x33, dst, src, kInt32Size);
1526 } else { 1532 } else {
1527 arithmetic_op(0x33, dst, src, size); 1533 arithmetic_op(0x33, dst, src, size);
1528 } 1534 }
1529 } 1535 }
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1581 private: 1587 private:
1582 Assembler* assembler_; 1588 Assembler* assembler_;
1583 #ifdef DEBUG 1589 #ifdef DEBUG
1584 int space_before_; 1590 int space_before_;
1585 #endif 1591 #endif
1586 }; 1592 };
1587 1593
1588 } } // namespace v8::internal 1594 } } // namespace v8::internal
1589 1595
1590 #endif // V8_X64_ASSEMBLER_X64_H_ 1596 #endif // V8_X64_ASSEMBLER_X64_H_
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