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Issue 426233002: Land the Fan (disabled) (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Review feedback, rebase and "git cl format" Created 6 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/v8.h" 5 #include "src/v8.h"
6 6
7 #if V8_TARGET_ARCH_X64 7 #if V8_TARGET_ARCH_X64
8 8
9 #include "src/macro-assembler.h" 9 #include "src/macro-assembler.h"
10 #include "src/serialize.h" 10 #include "src/serialize.h"
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894 894
895 895
896 void Assembler::emit_idiv(Register src, int size) { 896 void Assembler::emit_idiv(Register src, int size) {
897 EnsureSpace ensure_space(this); 897 EnsureSpace ensure_space(this);
898 emit_rex(src, size); 898 emit_rex(src, size);
899 emit(0xF7); 899 emit(0xF7);
900 emit_modrm(0x7, src); 900 emit_modrm(0x7, src);
901 } 901 }
902 902
903 903
904 void Assembler::emit_div(Register src, int size) {
905 EnsureSpace ensure_space(this);
906 emit_rex(src, size);
907 emit(0xF7);
908 emit_modrm(0x6, src);
909 }
910
911
904 void Assembler::emit_imul(Register src, int size) { 912 void Assembler::emit_imul(Register src, int size) {
905 EnsureSpace ensure_space(this); 913 EnsureSpace ensure_space(this);
906 emit_rex(src, size); 914 emit_rex(src, size);
907 emit(0xF7); 915 emit(0xF7);
908 emit_modrm(0x5, src); 916 emit_modrm(0x5, src);
909 } 917 }
910 918
911 919
912 void Assembler::emit_imul(Register dst, Register src, int size) { 920 void Assembler::emit_imul(Register dst, Register src, int size) {
913 EnsureSpace ensure_space(this); 921 EnsureSpace ensure_space(this);
(...skipping 473 matching lines...) Expand 10 before | Expand all | Expand 10 after
1387 EnsureSpace ensure_space(this); 1395 EnsureSpace ensure_space(this);
1388 // 32 bit operations zero the top 32 bits of 64 bit registers. Therefore 1396 // 32 bit operations zero the top 32 bits of 64 bit registers. Therefore
1389 // there is no need to make this a 64 bit operation. 1397 // there is no need to make this a 64 bit operation.
1390 emit_optional_rex_32(dst, src); 1398 emit_optional_rex_32(dst, src);
1391 emit(0x0F); 1399 emit(0x0F);
1392 emit(0xB6); 1400 emit(0xB6);
1393 emit_operand(dst, src); 1401 emit_operand(dst, src);
1394 } 1402 }
1395 1403
1396 1404
1405 void Assembler::emit_movzxb(Register dst, Register src, int size) {
1406 EnsureSpace ensure_space(this);
1407 // 32 bit operations zero the top 32 bits of 64 bit registers. Therefore
1408 // there is no need to make this a 64 bit operation.
1409 emit_optional_rex_32(dst, src);
1410 emit(0x0F);
1411 emit(0xB6);
1412 emit_modrm(dst, src);
1413 }
1414
1415
1397 void Assembler::emit_movzxw(Register dst, const Operand& src, int size) { 1416 void Assembler::emit_movzxw(Register dst, const Operand& src, int size) {
1398 EnsureSpace ensure_space(this); 1417 EnsureSpace ensure_space(this);
1399 // 32 bit operations zero the top 32 bits of 64 bit registers. Therefore 1418 // 32 bit operations zero the top 32 bits of 64 bit registers. Therefore
1400 // there is no need to make this a 64 bit operation. 1419 // there is no need to make this a 64 bit operation.
1401 emit_optional_rex_32(dst, src); 1420 emit_optional_rex_32(dst, src);
1402 emit(0x0F); 1421 emit(0x0F);
1403 emit(0xB7); 1422 emit(0xB7);
1404 emit_operand(dst, src); 1423 emit_operand(dst, src);
1405 } 1424 }
1406 1425
(...skipping 274 matching lines...) Expand 10 before | Expand all | Expand 10 after
1681 emit(0x87); 1700 emit(0x87);
1682 emit_modrm(dst, src); 1701 emit_modrm(dst, src);
1683 } else { 1702 } else {
1684 emit_rex(src, dst, size); 1703 emit_rex(src, dst, size);
1685 emit(0x87); 1704 emit(0x87);
1686 emit_modrm(src, dst); 1705 emit_modrm(src, dst);
1687 } 1706 }
1688 } 1707 }
1689 1708
1690 1709
1710 void Assembler::emit_xchg(Register dst, const Operand& src, int size) {
1711 EnsureSpace ensure_space(this);
1712 emit_rex(dst, src, size);
1713 emit(0x87);
1714 emit_operand(dst, src);
1715 }
1716
1717
1691 void Assembler::store_rax(void* dst, RelocInfo::Mode mode) { 1718 void Assembler::store_rax(void* dst, RelocInfo::Mode mode) {
1692 EnsureSpace ensure_space(this); 1719 EnsureSpace ensure_space(this);
1693 if (kPointerSize == kInt64Size) { 1720 if (kPointerSize == kInt64Size) {
1694 emit(0x48); // REX.W 1721 emit(0x48); // REX.W
1695 emit(0xA3); 1722 emit(0xA3);
1696 emitp(dst, mode); 1723 emitp(dst, mode);
1697 } else { 1724 } else {
1698 ASSERT(kPointerSize == kInt32Size); 1725 ASSERT(kPointerSize == kInt32Size);
1699 emit(0xA3); 1726 emit(0xA3);
1700 emitp(dst, mode); 1727 emitp(dst, mode);
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2968 2995
2969 2996
2970 bool RelocInfo::IsInConstantPool() { 2997 bool RelocInfo::IsInConstantPool() {
2971 return false; 2998 return false;
2972 } 2999 }
2973 3000
2974 3001
2975 } } // namespace v8::internal 3002 } } // namespace v8::internal
2976 3003
2977 #endif // V8_TARGET_ARCH_X64 3004 #endif // V8_TARGET_ARCH_X64
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