Adds intrinsics for arm64.

runtime/vm/intermediate_language_arm64.cc

Index: runtime/vm/intermediate_language_arm64.cc
===================================================================
--- runtime/vm/intermediate_language_arm64.cc	(revision 36300)
+++ runtime/vm/intermediate_language_arm64.cc	(working copy)
@@ -2454,10 +2454,10 @@
                                         Register result) {
   if (!range->IsWithin(-0x20000000000000LL, 0x20000000000000LL)) {
     ASSERT(overflow != NULL);
-    __ CompareImmediate(result, -0x20000000000000LL, PP);
-    __ b(overflow, LT);
-    __ CompareImmediate(result, 0x20000000000000LL, PP);
-    __ b(overflow, GT);
+    __ LoadImmediate(TMP, 0x20000000000000LL, PP);
+    __ add(TMP2, result, Operand(TMP));
+    __ cmp(TMP2, Operand(TMP, LSL, 1));
+    __ b(overflow, HI);

[regis, 2014/05/19 20:14:02]

Thanks for implementing my suggestion!

   }
 }
 
@@ -2569,8 +2569,8 @@
     }
     // Left is not a constant.
     // Check if count too large for handling it inlined.
-    __ Asr(TMP, right, kSmiTagSize);  // SmiUntag right into IP.
-    // Overflow test (preserve left, right, and IP);
+    __ Asr(TMP, right, kSmiTagSize);  // SmiUntag right into TMP.
+    // Overflow test (preserve left, right, and TMP);
     Register temp = locs.temp(0).reg();
     __ lslv(temp, left, TMP);
     __ asrv(TMP2, temp, TMP);