Stores to external references don't need write barriers.

Stores to external references don't need write barriers.

This also applies to stores with an external field representation.

Also cleans up the CreateAllocationSiteStub.

R=mstarzinger@chromium.org, mvstanton@chromium.org

Committed: https://code.google.com/p/v8/source/detail?r=15989

[Benedikt Meurer, 2013-07-31 12:59:58]

Hey Michael,
This is the change we discussed offline.
-- Benedikt

[mvstanton, 2013-07-31 13:37:47]

A couple of nits, then lgtm.

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-codegen-ia32.cc
File src/ia32/lithium-codegen-ia32.cc (right):

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-codegen-ia32...
src/ia32/lithium-codegen-ia32.cc:4345:
ASSERT(!instr->hydrogen()->NeedsWriteBarrier());
This assert should be in the other platforms too.

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-ia32.cc
File src/ia32/lithium-ia32.cc (right):

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-ia32.cc#newc...
src/ia32/lithium-ia32.cc:2432: ? UseRegister(instr->object())
Is this reordering needed?
If so, do you need to make the change for ARM as well as x64 and ia32?

[Michael Starzinger, 2013-07-31 13:40:19]

LGTM with a nit.

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-codegen-ia32.cc
File src/ia32/lithium-codegen-ia32.cc (right):

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-codegen-ia32...
src/ia32/lithium-codegen-ia32.cc:4345:
ASSERT(!instr->hydrogen()->NeedsWriteBarrier());
nit: Can we add the same assert to the x64 port as well?

[Benedikt Meurer, 2013-07-31 13:45:39]

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-codegen-ia32.cc
File src/ia32/lithium-codegen-ia32.cc (right):

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-codegen-ia32...
src/ia32/lithium-codegen-ia32.cc:4345:
ASSERT(!instr->hydrogen()->NeedsWriteBarrier());
On 2013/07/31 13:37:47, mvstanton wrote:
> This assert should be in the other platforms too.

Done.

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-ia32.cc
File src/ia32/lithium-ia32.cc (right):

https://codereview.chromium.org/21357003/diff/1/src/ia32/lithium-ia32.cc#newc...
src/ia32/lithium-ia32.cc:2432: ? UseRegister(instr->object())
On 2013/07/31 13:37:47, mvstanton wrote:
> Is this reordering needed?

Nope.

> If so, do you need to make the change for ARM as well as x64 and ia32?

No, ARM is a regular load/store architecture.

[Benedikt Meurer, 2013-07-31 13:45:58]

Committed patchset #2 manually as r15989 (presubmit successful).