[Subzero][MIPS32] Add argument handling in LowerCall

src/IceRegistersMIPS32.h

Index: src/IceRegistersMIPS32.h
diff --git a/src/IceRegistersMIPS32.h b/src/IceRegistersMIPS32.h
index f6ea38e312b5b65537cbc20c7acff76456ddf1b7..aadf19b71da6ee0378f07331c2abf0c16f32eae0 100644
--- a/src/IceRegistersMIPS32.h
+++ b/src/IceRegistersMIPS32.h
@@ -89,6 +89,18 @@ static inline bool isFPRReg(RegNumT RegNum) {
 
 const char *getRegName(RegNumT RegNum);
 
+static inline RegNumT getI64PairFirstGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
+  return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A0

[Jim Stichnoth, 2016/06/02 14:09:53]

This is still a problem, I think.

It looks like getI64PairFirstGPRNum(Reg_V0V1) will return Reg_A2, which seems
wrong.

Do you think something like the following is right, until a table-driven
approach is ready?

  return fixme((unsigned(RegNum) - Reg_I64PAIR_First) * 2 + Reg_GPR_First);

+                                         : RegMIPS32::Reg_A2;
+}
+
+static inline RegNumT getI64PairSecondGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
+  return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A1
+                                         : RegMIPS32::Reg_A3;
+}
+
 } // end of namespace RegMIPS32
 
 // Extend enum RegClass with MIPS32-specific register classes (if any).