[Subzero][MIPS32] Add argument handling in LowerCall

src/IceRegistersMIPS32.h

 //===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 71 matching lines @@
   return FPRRegister(RegNum - Reg_FPR_First);
 }
 
 static inline bool isFPRReg(RegNumT RegNum) {
   return (int(Reg_FPR_First) <= int(RegNum)) &&
          (unsigned(RegNum) <= Reg_FPR_Last);
 }
 
 const char *getRegName(RegNumT RegNum);
 
+static inline RegNumT getI64PairFirstGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
+  return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A0

[Jim Stichnoth, 2016/06/02 14:09:53]

This is still a problem, I think.

It looks like getI64PairFirstGPRNum(Reg_V0V1) will return Reg_A2, which seems
wrong.

Do you think something like the following is right, until a table-driven
approach is ready?

  return fixme((unsigned(RegNum) - Reg_I64PAIR_First) * 2 + Reg_GPR_First);

+                                         : RegMIPS32::Reg_A2;
+}
+
+static inline RegNumT getI64PairSecondGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
+  return (RegNum == RegMIPS32::Reg_A0A1) ? RegMIPS32::Reg_A1
+                                         : RegMIPS32::Reg_A3;
+}
+
 } // end of namespace RegMIPS32
 
 // Extend enum RegClass with MIPS32-specific register classes (if any).
 enum RegClassMIPS32 : uint8_t { RCMIPS32_NUM = RC_Target };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H