Index: src/IceTargetLoweringMIPS32.h |
diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h |
index aca82cd50d71bddb9b0d65d234e84241367a62ea..b0f5202bc4268cf41f377f55ef20f4672acab265 100644 |
--- a/src/IceTargetLoweringMIPS32.h |
+++ b/src/IceTargetLoweringMIPS32.h |
@@ -397,6 +397,29 @@ public: |
Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT()); |
+ /// Helper class that understands the Calling Convention and register |
+ /// assignments. |
+ class CallingConv { |
+ CallingConv(const CallingConv &) = delete; |
+ CallingConv &operator=(const CallingConv &) = delete; |
+ |
+ public: |
+ CallingConv(); |
+ ~CallingConv() = default; |
+ |
+ /// argInGPR returns true if there is a GPR available for the requested |
+ /// type, and false otherwise. If it returns true, Reg is set to the |
+ /// appropriate register number. Note that, when Ty == IceType_i64, Reg will |
+ /// be an I64 register pair. |
+ bool argInGPR(Type Ty, RegNumT *Reg); |
+ |
+ private: |
+ void discardUnavailableGPRsAndTheirAliases(CfgVector<RegNumT> *Regs); |
+ SmallBitVector GPRegsUsed; |
+ CfgVector<RegNumT> GPRArgs; |
+ CfgVector<RegNumT> I64Args; |
+ }; |
+ |
protected: |
explicit TargetMIPS32(Cfg *Func); |