Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(70)

Issue 2005823002: [Subzero][MIPS32] Add LowerStore implementation (Closed)

Created:
4 years, 7 months ago by mohit.bhakkad
Modified:
4 years, 6 months ago
CC:
native-client-reviews_googlegroups.com, sagar.thakur, srdjan1, rich.fuhler_imgtec.com
Base URL:
https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Target Ref:
refs/heads/master
Visibility:
Public.

Description

- This patch implements lowerstore for i32, i64 types for mips32 arch. - InstMIPS32Memory class is added to represent memory related instructions(load/store). I will add remaining load/store instructions if you are okay with this patch. - Changed uncond_br.ll test as it was failing due to hardcoded label no. expected in output. R=jpp@chromium.org, stichnot@chromium.org Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=f3bc5cf730eaa6117a9d494ce61613a3118acd4d

Patch Set 1 #

Total comments: 4

Patch Set 2 : Addressed review comments, enabled store test for MIPS32 #

Total comments: 1
Unified diffs Side-by-side diffs Delta from patch set Stats (+126 lines, -7 lines) Patch
M src/IceInstMIPS32.h View 1 3 chunks +54 lines, -0 lines 0 comments Download
M src/IceInstMIPS32.cpp View 2 chunks +7 lines, -2 lines 0 comments Download
M src/IceTargetLoweringMIPS32.h View 3 chunks +10 lines, -2 lines 0 comments Download
M src/IceTargetLoweringMIPS32.cpp View 1 2 chunks +32 lines, -1 line 1 comment Download
M tests_lit/llvm2ice_tests/store.ll View 1 5 chunks +21 lines, -0 lines 0 comments Download
M tests_lit/llvm2ice_tests/uncond_br.ll View 1 1 chunk +2 lines, -2 lines 0 comments Download

Messages

Total messages: 10 (3 generated)
mohit.bhakkad
4 years, 7 months ago (2016-05-23 12:14:39 UTC) #3
John
lgtm https://codereview.chromium.org/2005823002/diff/1/src/IceInstMIPS32.h File src/IceInstMIPS32.h (right): https://codereview.chromium.org/2005823002/diff/1/src/IceInstMIPS32.h#newcode311 src/IceInstMIPS32.h:311: // InstMIPS32Memory represents instructions which loads/stores data on ...
4 years, 7 months ago (2016-05-23 13:30:38 UTC) #4
Jim Stichnoth
This is looking good. Is there / can there be a MIPS store test in ...
4 years, 7 months ago (2016-05-23 17:12:19 UTC) #5
mohit.bhakkad
Hi Jim, could you please review this. 2021033002 is dependent on this.
4 years, 6 months ago (2016-05-31 06:04:46 UTC) #6
mohit.bhakkad
4 years, 6 months ago (2016-05-31 06:05:01 UTC) #7
Jim Stichnoth
lgtm https://codereview.chromium.org/2005823002/diff/20001/src/IceTargetLoweringMIPS32.cpp File src/IceTargetLoweringMIPS32.cpp (right): https://codereview.chromium.org/2005823002/diff/20001/src/IceTargetLoweringMIPS32.cpp#newcode378 src/IceTargetLoweringMIPS32.cpp:378: if (llvm::isa<OperandMIPS32Mem>(Operand)) { Sorry, I was a bit ...
4 years, 6 months ago (2016-05-31 18:18:52 UTC) #8
Jim Stichnoth
4 years, 6 months ago (2016-05-31 18:19:08 UTC) #10
Message was sent while issue was closed.
Committed patchset #2 (id:20001) manually as
f3bc5cf730eaa6117a9d494ce61613a3118acd4d (presubmit successful).

Powered by Google App Engine
This is Rietveld 408576698