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Unified Diff: src/IceTargetLoweringMIPS32.cpp

Issue 2005823002: [Subzero][MIPS32] Add LowerStore implementation (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments, enabled store test for MIPS32 Created 4 years, 7 months ago
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Index: src/IceTargetLoweringMIPS32.cpp
diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
index ce1f810f73912944c8b2d7f920853c642d8043e2..5959dfd4b61b0bb2ea83820322bfad16f6d54c8a 100644
--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -371,6 +371,23 @@ Variable *TargetMIPS32::makeReg(Type Type, RegNumT RegNum) {
return Reg;
}
+OperandMIPS32Mem *TargetMIPS32::formMemoryOperand(Operand *Operand, Type Ty) {
+ // It may be the case that address mode optimization already creates an
+ // OperandMIPS32Mem, so in that case it wouldn't need another level of
+ // transformation.
+ if (llvm::isa<OperandMIPS32Mem>(Operand)) {
Jim Stichnoth 2016/05/31 18:18:52 Sorry, I was a bit off in my previous comment. Th
+ return llvm::cast<OperandMIPS32Mem>(Operand);
+ }
+
+ // If we didn't do address mode optimization, then we only have a base/offset
+ // to work with. MIPS always requires a base register, so just use that to
+ // hold the operand.
+ auto *Base = llvm::cast<Variable>(legalize(Operand, Legal_Reg));
+ return OperandMIPS32Mem::create(
+ Func, Ty, Base,
+ llvm::cast<ConstantInteger32>(Ctx->getConstantZero(IceType_i32)));
+}
+
void TargetMIPS32::emitVariable(const Variable *Var) const {
if (!BuildDefs::dump())
return;
@@ -1327,7 +1344,21 @@ void TargetMIPS32::lowerShuffleVector(const InstShuffleVector *Instr) {
}
void TargetMIPS32::lowerStore(const InstStore *Instr) {
- UnimplementedLoweringError(this, Instr);
+ Operand *Value = Instr->getData();
+ Operand *Addr = Instr->getAddr();
+ OperandMIPS32Mem *NewAddr = formMemoryOperand(Addr, Value->getType());
+ Type Ty = NewAddr->getType();
+
+ if (Ty == IceType_i64) {
+ Value = legalizeUndef(Value);
+ Variable *ValueHi = legalizeToReg(hiOperand(Value));
+ Variable *ValueLo = legalizeToReg(loOperand(Value));
+ _sw(ValueHi, llvm::cast<OperandMIPS32Mem>(hiOperand(NewAddr)));
+ _sw(ValueLo, llvm::cast<OperandMIPS32Mem>(loOperand(NewAddr)));
+ } else {
+ Variable *ValueR = legalizeToReg(Value);
+ _sw(ValueR, NewAddr);
+ }
}
void TargetMIPS32::doAddressOptStore() { UnimplementedError(getFlags()); }
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