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Unified Diff: src/IceTargetLoweringMIPS32.h

Issue 1975283002: Subzero, MIPS32: Implement logical instructions ashr, lshr, shl (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 7 months ago
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Index: src/IceTargetLoweringMIPS32.h
diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h
index 0454f30da1e419bd92c1a14f03e446a8ec74aae5..a90311a2f0d76cb046027b2c9d78a8bd23d11aca 100644
--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -224,6 +224,10 @@ public:
Context.insert<InstMIPS32Sll>(Dest, Src, Imm);
}
+ void _sllv(Variable *Dest, Variable *Src0, Variable *Src1) {
+ Context.insert<InstMIPS32Sllv>(Dest, Src0, Src1);
+ }
+
void _slt(Variable *Dest, Variable *Src0, Variable *Src1) {
Context.insert<InstMIPS32Slt>(Dest, Src0, Src1);
}
@@ -244,6 +248,18 @@ public:
Context.insert<InstMIPS32Sra>(Dest, Src, Imm);
}
+ void _srav(Variable *Dest, Variable *Src0, Variable *Src1) {
+ Context.insert<InstMIPS32Srav>(Dest, Src0, Src1);
+ }
+
+ void _srl(Variable *Dest, Variable *Src, uint32_t Imm) {
+ Context.insert<InstMIPS32Srl>(Dest, Src, Imm);
+ }
+
+ void _srlv(Variable *Dest, Variable *Src0, Variable *Src1) {
+ Context.insert<InstMIPS32Srlv>(Dest, Src0, Src1);
+ }
+
void _sub(Variable *Dest, Variable *Src0, Variable *Src1) {
Context.insert<InstMIPS32Sub>(Dest, Src0, Src1);
}

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